Park, Jiwoon
(Department of Electronics Engineering, Chungnam National University, Daejeon 34134, Korea)
,
Kim, Minsu
(Department of Electronics Engineering, Chungnam National University, Daejeon 34134, Korea)
,
Jo, Gwanghee
(Department of Electronics Engineering, Chungnam National University, Daejeon 34134, Korea)
,
Yoo, Hoyoung
(Department of Electronics Engineering, Chungnam National University, Daejeon 34134, Korea)
Recently, multi-frequency multi-constellation receivers have been actively studied, which are single receivers that process multiple global navigation satellite system (GNSS) signals for high accuracy and reliability. However, in order for a single receiver to process multiple GNSS signals, it requi...
Recently, multi-frequency multi-constellation receivers have been actively studied, which are single receivers that process multiple global navigation satellite system (GNSS) signals for high accuracy and reliability. However, in order for a single receiver to process multiple GNSS signals, it requires as many code generators as the number of supported GNSS signals, and this is one of the problems that must be solved in implementing an efficient multi-frequency multi-constellation receiver. This paper proposes an area-efficient universal code generator that can support both GPS L1C signals and BDS B1C signals. The proposed architecture alleviates the area problem by sharing common hardware in a time-multiplex mode without degrading the overall system performance. According to the result of the synthesis using the CMOS 65 nm process, the proposed universal code generator has an area reduced by 98%, 93%, and 60% compared to the previous memory-based universal code generator (MB UCG), the Legendre-generation universal code generator (LG UCG), and the Weil-generation universal code generator (WG UCG), respectively. Furthermore, the proposed generator is applicable to all Legendre sequence-based codes.
Recently, multi-frequency multi-constellation receivers have been actively studied, which are single receivers that process multiple global navigation satellite system (GNSS) signals for high accuracy and reliability. However, in order for a single receiver to process multiple GNSS signals, it requires as many code generators as the number of supported GNSS signals, and this is one of the problems that must be solved in implementing an efficient multi-frequency multi-constellation receiver. This paper proposes an area-efficient universal code generator that can support both GPS L1C signals and BDS B1C signals. The proposed architecture alleviates the area problem by sharing common hardware in a time-multiplex mode without degrading the overall system performance. According to the result of the synthesis using the CMOS 65 nm process, the proposed universal code generator has an area reduced by 98%, 93%, and 60% compared to the previous memory-based universal code generator (MB UCG), the Legendre-generation universal code generator (LG UCG), and the Weil-generation universal code generator (WG UCG), respectively. Furthermore, the proposed generator is applicable to all Legendre sequence-based codes.
참고문헌 (17)
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10.1109/ICEIC51217.2021.9369771 Park, J., Jo, G., Kim, J., and Yoo, H. (February, January 31). Area-Efficient On-the-Fly Code Generator for BDS B1C Receivers. Proceedings of the 2021 International Conference on Electronics, Information, and Communication (ICEIC), Jeju, Korea.
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