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NTIS 바로가기Micromachines, v.12 no.11, 2021년, pp.1401 -
Jeong, Jun-Kyo , Sung, Jae-Young , Ko, Woon-San , Nam, Ki-Ryung , Lee, Hi-Deok , Lee, Ga-Won
In this study, polycrystalline silicon (poly-Si) is applied to silicon-oxide-nitride-oxide-silicon (SONOS) flash memory as a channel material and the physical and electrical characteristics are analyzed. The results show that the surface roughness of silicon nitride as charge trapping layer (CTL) is...
2. Xie Q. Lee C.J. Xu J. Wann C. Sun J.Y.C. Taur Y. Comprehensive analysis of short-channel effects in ultrathin SOI MOSFETs IEEE Trans. Electron. Devices 2013 60 1814 1819 10.1109/TED.2013.2255878
3. Bohara P. Vishvakarma S.K. NAND flash memory device with ground plane in buried oxide for reduced short channel effects and improved data retention J. Comput. Electron. 2019 18 500 508 10.1007/s10825-018-01298-9
4. Endoh T. Kinoshita K. Tanigami T. Wada Y. Sato K. Yamada K. Yokoyama T. Takeuchi N. Tanaka K. Awaya N. Novel ultrahigh-density flash memory with a stacked-surrounding gate transistor (S-SGT) structured cell IEEE Trans. Electron. Devices 2003 50 945 951 10.1109/TED.2003.809429
5. Kim H. Ahn S.J. Shin Y.G. Lee K. Jung E. Evolution of NAND flash memory: From 2D to 3D as a storage market leader Proceedings of the 2017 IEEE International Memory Workshop (IMW) Monterey, CA, USA 14–17 May 2017 IEEE Monterey, CA, USA 2017 1 4
6. Seager C.H. Grain boundaries in polycrystalline silicon Ann. Rev. Mater. Sci. 1985 15 271 302 10.1146/annurev.ms.15.080185.001415
7. Yamashita Y. Asano A. Nishioka Y. Kobayashi H. Dependence of interface states in the Si band gap on oxide atomic density and interfacial roughness Phys. Rev. B 1999 59 15872 10.1103/PhysRevB.59.15872
8. Hong S.B. Park J.H. Lee T.H. Lim J.H. Shin C. Park Y.W. Kim T.G. Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors Appl. Surf. Sci. 2019 477 104 110 10.1016/j.apsusc.2017.11.226
9. Aozasa H. Fujiwara I. Nomoto K. Komatsu H. Koyama K. Kobayashi T. Oda T. Effects of nitridation on the electrical properties of MONOS nonvolatile memories J. Electrochem. Soc. 2007 154 H798 10.1149/1.2752979
10. Kizilyalli I.C. Lyding J.W. Hess K. Deuterium post-metal annealing of MOSFET’s for improved hot carrier reliability IEEE Electron. Device Lett. 1997 18 81 83 10.1109/55.556087
11. Cheng K. Hess K. Lyding J.W. A new technique to quantify deuterium passivation of interface traps in MOS devices IEEE Electron. Device Lett. 2001 22 203 205 10.1109/55.919229
12. Yang Y.L. Purwar A. White M.H. Reliability considerations in scaled SONOS nonvolatile memory devices Solid State Electron. 1999 43 2025 2032 10.1016/S0038-1101(99)00161-6
13. Li W. Li D.Y. On the correlation between surface roughness and work function in copper J. Chem. Phys. 2005 122 064708 10.1063/1.1849135 15740397
14. Choi Y.W. Xie K. Kim H.M. Wie C.R. Interface trap and interface depletion in lattice-mismatched GaInAs/GaAs heterostructures J. Electron. Mater. 1991 20 545 551 10.1007/BF02666016
15. Huang Z.C. Wie C.R. Johnstone D.K. Stutz C.E. Evans K.R. Effects of lattice mismatch and thermal annealing on deep traps and interface states in Ga0. 92In0. 08As (n+)/GaAs (p) heterojunctions J. Appl. Phys. 1993 73 4362 4366 10.1063/1.352821
16. Lee J.D. Choi J.H. Park D. Kim K. Effects of interface trap generation and annihilation on the data retention characteristics of flash memory cells IEEE Trans. Device Mater. Reliab. 2004 4 110 117 10.1109/TDMR.2004.824360
17. Yang S.D. Jung J.K. Lim J.G. Park S.G. Lee H.D. Lee G.W. Investigation of Intra-Nitride Charge Migration Suppression in SONOS Flash Memory Micromachines 2019 10 356 10.3390/mi10060356 31146426
18. Park Y.B. Rhee S.W. Bulk and interface properties of low-temperature silicon nitride films deposited by remote plasma enhanced chemical vapor deposition J. Mater. Sci. Mater. Electron. 2001 12 515 522 10.1023/A:1012449425744
19. Huang J.J. Liu C.J. Lin H.C. Tsai C.J. Chen Y.P. Hu G.R. Lee C.C. Influences of low temperature silicon nitride films on the electrical performances of hydrogenated amorphous silicon thin film transistors J. Phys. D Appl. Phys. 2008 41 245502 10.1088/0022-3727/41/24/245502
20. Wong H. Gritsenko V.A. Defects in silicon oxynitride gate dielectric films Microelectron. Reliab. 2002 42 597 605 10.1016/S0026-2714(02)00005-7
21. Lusky E. Shacham-Diamand Y. Shappir A. Bloom I. Eitan B. Traps spectroscopy of the Si 3 Ni 4 layer using localized charge-trapping nonvolatile memory device Appl. Phys. Lett. 2004 85 669 671 10.1063/1.1774272
22. Perera R. Ikeda A. Hattori R. Kuroki Y. Effects of post annealing on removal of defect states in silicon oxynitride films grown by oxidation of silicon substrates nitrided in inductively coupled nitrogen plasma Thin Solid Film 2003 423 212 217 10.1016/S0040-6090(02)01044-1
23. Vianello E. Driussi F. Blaise P. Palestri P. Esseni D. Perniola L. Molas G. De Salvo B. Selmi L. Explanation of the charge trapping properties of silicon nitride storage layers for NVMs—Part II: Atomistic and electrical modeling IEEE Trans. Electron. Devices 2011 58 2490 2499 10.1109/TED.2011.2156407
24. Gritsenko V.A. Perevalov T.V. Orlov O.M. Krasnikov G.Y. Nature of traps responsible for the memory effect in silicon nitride Appl. Phys. Lett. 2016 109 062904 10.1063/1.4959830
25. Sonoda K.I. Tsukuda E. Tanizawa M. Yamaguchi Y. Electron trap level of hydrogen incorporated nitrogen vacancies in silicon nitride J. Appl. Phys. 2015 117 104501 10.1063/1.4914163
26. Yamaguchi K. Otake A. Kobayashi K. Shiraishi K. Atomistic guiding principles for MONOS-type memories with high program/erase cycle endurance Proceedings of the 2009 IEEE International Electron Devices Meeting (IEDM) Baltimore, MD, USA 7–9 December 2009 IEEE Baltimore, MD, USA 2009 1 4
27. Noguchi M. Isogai T. Yamashita H. Sawa K. Fujitsuka R. Yamanaka T. Okada S. Aoyama T. Aiso F. Abe J. Formation of High Reliability Hydrogen-free MONOS Cells Using Deuterated Ammonia Proceedings of the 2019 IEEE International Electron Devices Meeting (IEDM) San Francisco, CA, USA 7–11 December 2019 IEEE San Francisco, CA, USA 2019 30 32
28. Tanaka M. Saida S. Mitani Y. Mizushima I. Tsunashima Y. Highly reliable MONOS Devices with optimized silicon nitride film having deuterium terminated charge traps Proceedings of the 2002 Digest. International Electron Devices Meeting Washington, DC, USA 2–5 December 2001 IEEE San Francisco, CA, USA 2003 237 240
29. Choi S. Baek S. Jang M. Jeon S. Kim J. Kim C. Hwang H. Effects of High-Pressure Deuterium annealing on nonvolatile memory device with silicon nanocrystals embedded in silicon nitride J. Electrochem. Soc. 2005 152 G345 10.1149/1.1878012
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