최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기Semiconductor science and technology, v.28 no.8, 2013년, pp.085008 -
Chen, Han-Ping (Department of Electrical and Computer Engineering, University of California, San Diego, CA 92093, USA) , Yuan, Yu (Department of Electrical and Computer Engineering, University of California, San Diego, CA 92093, USA) , Yu, Bo (Department of Electrical and Computer Engineering, University of California, San Diego, CA 92093, USA) , Chang, Chih-Sheng (Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan) , Wann, Clement (Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan) , Taur, Yuan (Department of Electrical and Computer Engineering, University of California, San Diego, CA 92093, USA)
The extraction of interface-state density by the stretchout of MOS C–V (Terman method) is re-examined. It is shown that the typical 1 MHz frequency is not nearly high enough to get rid of the interface-state contribution to the MOS capacitance. When coupled with a bias-dependent trap time...
1982 MOS (Metal Oxide Semiconductor) Physics and Technology Nicollian E H
Martens, K., Wang, W., De Keersmaecker, K., Borghs, G., Groeseneken, G., Maes, H.. Impact of weak Fermi-level pinning on the correct interpretation of III-V MOS C-V and G-V characteristics. Microelectronic engineering, vol.84, no.9, 2146-2149.
Martens, K., Chi On Chui, Brammertz, G., De Jaeger, B., Kuzum, D., Meuris, M., Heyns, M., Krishnamohan, T., Saraswat, K., Maes, H.E., Groeseneken, G.. On the Correct Extraction of Interface Trap Density of MOS Devices With High-Mobility Semiconductor Substrates. IEEE transactions on electron devices, vol.55, no.2, 547-556.
Vogel, E.M., Henson, W.K., Richter, C.A., Suehle, J.S.. Limitations of conductance to the measurement of the interface state density of MOS capacitors with tunneling gate dielectrics. IEEE transactions on electron devices, vol.47, no.3, 601-608.
2010 96 102 Appl. Phys. Lett. Hwang Y
Brammertz, Guy, Lin, H.C., Martens, Koen, Mercier, David, Merckling, Clement, Penaud, Julien, Adelmann, Christoph, Sioncke, Sonja, Wang, Wei-E, Caymax, Matty, Meuris, Marc, Heyns, Marc M.. Capacitance-Voltage (CV) Characterization of GaAs-Oxide Interfaces. ECS transactions, vol.16, no.5, 507-519.
Terman, L.M.. An investigation of surface states at a silicon/silicon oxide interface employing metal-oxide-silicon diodes. Solid-state electronics, vol.5, no.5, 285-299.
2007 TCAD
Chen, Han-Ping, Yuan, Yu, Yu, Bo, Ahn, Jaesoo, McIntyre, Paul C., Asbeck, Peter M., Rodwell, Mark J. W., Taur, Yuan.
Interface-State Modeling of
Yu Yuan, Bo Yu, Jaesoo Ahn, McIntyre, P. C., Asbeck, P. M., Rodwell, M. J. W., Taur, Y..
A Distributed Bulk-Oxide Trap Model for
Stemmer, Susanne, Chobpattana, Varistha, Rajan, Siddharth. Frequency dispersion in III-V metal-oxide-semiconductor capacitors. Applied physics letters, vol.100, no.23, 233510-.
*원문 PDF 파일 및 링크정보가 존재하지 않을 경우 KISTI DDS 시스템에서 제공하는 원문복사서비스를 사용할 수 있습니다.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.