Ashraf, Muhammad Noman
(Department of Electrical Engineering, Soongsil University)
,
Khan, Reyyan Ahmad
(Department of Electrical Engineering, Soongsil University)
,
Choi, Woojin
(Department of Electrical Engineering, Soongsil University)
The output current of the Grid Connected Inverter (GCI) can be polluted with harmonics mainly due to i) dead time in switches, ii) non-linearity of switches, iii) grid harmonics, and iv) DC link fluctuation. Therefore, it is essential to design the robust Harmonic Compensation (HC) technique for the...
The output current of the Grid Connected Inverter (GCI) can be polluted with harmonics mainly due to i) dead time in switches, ii) non-linearity of switches, iii) grid harmonics, and iv) DC link fluctuation. Therefore, it is essential to design the robust Harmonic Compensation (HC) technique for the improvement of output current quality and fulfill the IEEE 1547 Total harmonics Distortion (THD) limit i.e. <5%. The conventional harmonic techniques often are complex in implementation due to their i) additional hardware needs, ii) complex structure, iii) difficulty in tuning of parameters, iv) current controller compatibility issues, and v) higher computational burden. In this paper, to eliminate the harmonics from the GCI output current, a novel Digital Lock-In Amplifier (DLA) based harmonic detection is proposed. The advantage of DLA is that it extracts the harmonic information accurately, which is further compensated by means of PI controller in feed forward manner. Moreover, the proposed HC method does not require additional hardware and it works with any current controller reference frame. To show the effectiveness of the proposed HC method a 5kW GCI prototype built in laboratory. The output current THD is achieved less than 5% even with 10% load, which is verified by simulation and experiment.
The output current of the Grid Connected Inverter (GCI) can be polluted with harmonics mainly due to i) dead time in switches, ii) non-linearity of switches, iii) grid harmonics, and iv) DC link fluctuation. Therefore, it is essential to design the robust Harmonic Compensation (HC) technique for the improvement of output current quality and fulfill the IEEE 1547 Total harmonics Distortion (THD) limit i.e. <5%. The conventional harmonic techniques often are complex in implementation due to their i) additional hardware needs, ii) complex structure, iii) difficulty in tuning of parameters, iv) current controller compatibility issues, and v) higher computational burden. In this paper, to eliminate the harmonics from the GCI output current, a novel Digital Lock-In Amplifier (DLA) based harmonic detection is proposed. The advantage of DLA is that it extracts the harmonic information accurately, which is further compensated by means of PI controller in feed forward manner. Moreover, the proposed HC method does not require additional hardware and it works with any current controller reference frame. To show the effectiveness of the proposed HC method a 5kW GCI prototype built in laboratory. The output current THD is achieved less than 5% even with 10% load, which is verified by simulation and experiment.
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가설 설정
In proposed method, amplitude and phase of 3rd, 5th and 7th harmonic is extracted through DLA. Detailed block diagram of hth order compensator is shown in Fig.
The proposed DLA based compensation technique is equipped with detecting not only amplitude but also the phase information of the selected harmonics, accurately. The proposed DLA HC algorithm has following advantages over the conventional methods, i) Proposed method does not require any additional hardware, it only require the current feedback information ii) DLA HC is independent of reference frame of current controller, iii)DLA HC control parameters are easy to tune because it contains only LPF and PI controller, iv) DLA HC is generalized, and it is capable of compensating any order of harmonic, v) It is immune to any kind of DC offset, high frequency noise and other measurements errors due to feedback sensor inaccuracies and vi) Proposed HC is independent of PLL phase angle. The working principle and design procedure of the proposed method will be explained in the next section.
제안 방법
Simulations and experiments are carried out with a 5kW inverter to evaluate the performance of the proposed harmonic compensation method under the non-sinusoidal grid conditions. The specification of the inverter is given in Table I.
In this paper Digital Lock-In Amplifier (DLA) based harmonic compensation technique is proposed. The proposed DLA based compensation technique is equipped with detecting not only amplitude but also the phase information of the selected harmonics, accurately. The proposed DLA HC algorithm has following advantages over the conventional methods, i) Proposed method does not require any additional hardware, it only require the current feedback information ii) DLA HC is independent of reference frame of current controller, iii)DLA HC control parameters are easy to tune because it contains only LPF and PI controller, iv) DLA HC is generalized, and it is capable of compensating any order of harmonic, v) It is immune to any kind of DC offset, high frequency noise and other measurements errors due to feedback sensor inaccuracies and vi) Proposed HC is independent of PLL phase angle.
This paper proposed a simple but cost-effective inverter-current harmonic mitigation strategy for the grid connected inverters based on Digital Lock-In Amplifier (DLA) to achieve multiple harmonic compensation. DLA HC works on the principle of frequency shifting/demodulation principle, amplitude and phase information any h th order harmonic can be extracted and compensated accurately from the highly distorted feedback current signal.
성능/효과
It can be realized from the TABLE II that proposed method improves the THD in inverter output current for load range between 10% to 100% rated power. Moreover, computational time of overall harmonic compensation loop employed for 3rd, 5th and 7th harmonics combined was measured as 16uS in TMS320F28335F Digital Signal Processor.
6 shows the experimental results for 1kW and 5kW. It is shown that THD at 1kW is reduced from 25.7% to 4.77%, whereas at full power THD is reduced from 8.36% to 1.58%. In Table II the results at other power are summarized.
The quality of inverter current for whole load range can be guaranteed even when the grid voltage is not ideal and severely distorted. Simulation and experimental results prove the efficacy of the proposed compensation technique with a significant reduction in THD.
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