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Example embodiments provide a disaggregated memory appliance, comprising: a plurality of leaf memory switches that manage one or more memory channels of one or more of leaf memory modules; a low-latency memory switch that arbitrarily connects one or more external processors to the plurality of leaf

Example embodiments provide a disaggregated memory appliance, comprising: a plurality of leaf memory switches that manage one or more memory channels of one or more of leaf memory modules; a low-latency memory switch that arbitrarily connects one or more external processors to the plurality of leaf memory modules over a host link; and a management processor that responds to requests from one or more external processors for management, maintenance, configuration and provisioning of the leaf memory modules within the memory appliance.

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1. A memory appliance, comprising: a plurality of leaf memory switches that each manage one or more memory channels of one or more of leaf memory modules; anda low-latency memory switch that arbitrarily connects one or more external processors to the plurality of leaf memory modules over a host link

1. A memory appliance, comprising: a plurality of leaf memory switches that each manage one or more memory channels of one or more of leaf memory modules; anda low-latency memory switch that arbitrarily connects one or more external processors to the plurality of leaf memory modules over a host link; anda management processor that responds to requests from one or more external processors for management, maintenance, configuration and provisioning of the leaf memory modules within the memory appliance. 2. The memory appliance of claim 1, further comprising: a plurality of leaf links that connect the low-latency memory switch to the plurality of leaf memory switches. 3. The memory appliance of claim 2, wherein the management processor accepts and processes requests from the one or more external processors for access to, or provisioning of, the leaf memory modules based on policy from a datacenter resource management service; and configures the leaf memory modules and leaf memory switches to satisfy requests for memory. 4. The memory appliance of claim 3, wherein the management processor creates and maintains a configuration and allocation database to manage the leaf memory modules. 5. The memory appliance of claim 3, wherein the management processor is implemented as part of a compute complex. 6. The memory appliance of claim 5, wherein the management processor is coupled to other components of the compute complex, including a complex programmable logic device (CPLD), a network port, a voltage regulation component, a clock generator and distribution component, an EEPROM, a flash (BIOS) memory, and a solid-state drive. 7. The memory appliance of claim 3, wherein the management processor is implemented in at least a portion of the leaf memory switches. 8. The memory appliance of claim 7, wherein the leaf memory switch comprises: a leaf link PHY coupled to a leaf link layer controller; a low latency switch coupled to the leaf link controller; a lightweight memory controller and PHY pair for each memory channel coupled to the low latency switch; and wherein the management processor is coupled to low latency switch and the lightweight memory controllers. 9. The memory appliance of claim 1, wherein the memory appliance uses a low-latency routing protocol used by both the low-latency memory switch and the leaf memory switches that encapsulate memory technology specific semantics by use of tags that uniquely identify the memory-technology during provisioning, monitoring and operation. 10. The memory appliance of claim 1, wherein the memory appliance uses wormhole switching in which endpoints use target routing data supplied during a memory provisioning process to effect low-latency switching of memory data flits and metadata. 11. A method for providing a disaggregated memory appliance, comprising: coupling a low-latency memory switch to a host link over which the low-latency memory switch receives requests and traffic from one or more external processors;using a plurality of leaf links to connect the low-latency memory switch to a plurality of leaf memory switches that are connected to, and manage, one or more memory channels of one or more of leaf memory modules; andresponding, by a management processor, to the requests from the one or more external processors for management, maintenance, configuration and provisioning of the leaf memory modules within the memory appliance. 12. The method of claim 11, further comprising: accepting and processing, by the management processor, the requests for access to, or provisioning of, the leaf memory modules based on policy from a datacenter resource management service; and configuring the leaf memory modules and leaf memory switches to satisfy requests for memory. 13. The method of claim 12, further comprising: creating and maintaining, by the management processor, a configuration and allocation database to manage the leaf memory modules. 14. The method of claim 12, wherein the management processor is implemented as part of a compute complex. 15. The method of claim 14, further comprising: coupling the management processor to other components of the compute complex, including a complex programmable logic device (CPLD), a network port, a voltage regulation component, a clock generator and distribution component, an EEPROM, a flash (BIOS) memory, and a solid-state drive. 16. The method of claim 12, further comprising: implementing the management processor in at least a portion of the leaf memory switches. 17. The method of claim 16, wherein the leaf memory switch comprises: a leaf link PHY coupled to a leaf link layer controller; a low latency switch coupled to the leaf link controller; a lightweight memory controller and PHY pair for each memory channel coupled to the low latency switch; and wherein the management processor is coupled to low latency switch and the lightweight memory controllers. 18. The method of claim 11, further comprising: using a low-latency routing protocol by both the low-latency memory switch and the leaf memory switches that encapsulate memory technology specific semantics by use of tags that uniquely identify the memory-technology during provisioning, monitoring and operation. 19. The method of claim 11, further comprising: using, by the memory appliance, wormhole switching in which endpoints use target routing data supplied during a memory provisioning process to effect low-latency switching of memory data flits and metadata.