초록
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A pulse-width doubler is disclosed as comprising a bistable multivibrator ving a first input, a second input, and an output, for producing a first signal at the output thereof in response to a predetermined second signal being supplied to the first input thereof and for producing a third signal that is different from said first signal at the output thereof in response to a predetermined fourth signal being supplied to the second input thereof. A digital counter and storer, having an up-count input, a down-count input, a zero reset input, and an output, w...
A pulse-width doubler is disclosed as comprising a bistable multivibrator ving a first input, a second input, and an output, for producing a first signal at the output thereof in response to a predetermined second signal being supplied to the first input thereof and for producing a third signal that is different from said first signal at the output thereof in response to a predetermined fourth signal being supplied to the second input thereof. A digital counter and storer, having an up-count input, a down-count input, a zero reset input, and an output, with the output thereof connected to the aforesaid second input of said first and third signals producing means, for up-counting the pulses of a pulsed fifth signal being supplied to the up-count input thereof, for down-counting the pulses of said up-counted pulses in response to a pulsed fixed signal being supplied to the down-count input thereof, and for producing the aforesaid fourth signal at the output thereof immediately after the aforesaid down-counting of said up-counted pulses have been completed. A steering generator, having an input and a pair of outputs, with the input thereof connected for response to the aforesaid predetermined second signal and with the pair of outputs thereof respectively connected to the up-count and down-count inputs of the aforesaid up-counting and down-counting signal counter and storer, for respectively generating and supplying said pulse fifth and sixth signals thereto in response to said first and third signals. A reset monostable multivibrator, having an input connected for response to said second signal and an output connected to the zero reset input of said up and down pulsed counter and storer for supplying a zero reset signal thereto in immediate response to said second signal.
대표
청구항
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1. A pulse-width doubler, comprising in combination: means, having a first input, a second input, and an output, for producing a first signal at the output thereof in response to a predetermined second signal being supplied to the first input thereof, and for producing a third signal that is different from said first signal at the output thereof in response to a predetermined fourth signal being supplied to the second input thereof; means, having an up-count input, a down-count input, a zero reset input, and an output, with the output thereof connect...
1. A pulse-width doubler, comprising in combination: means, having a first input, a second input, and an output, for producing a first signal at the output thereof in response to a predetermined second signal being supplied to the first input thereof, and for producing a third signal that is different from said first signal at the output thereof in response to a predetermined fourth signal being supplied to the second input thereof; means, having an up-count input, a down-count input, a zero reset input, and an output, with the output thereof connected to the aforesaid second input of said first and third signals producing means, for up-counting the pulses of a pulsed fifth signal being supplied to the up-count input thereof, for down-counting the pulses of said up-counted pulses in response to a pulsed sixth signal being supplied to the down-count input thereof, and for producing the aforesaid fourth signal at the output thereof immediately after the aforesaid down-counting of said up-counted pulses has been completed; means, having an input and a pair of outputs, with the input thereof connected for response to the aforesaid predetermined second signal, and with the pair of outputs thereof respectively connected to the up-count and down-count inputs of the aforesaid up-counting and down-counting means, for respectively generating and supplying said pulsed fifth and sixth signals thereto in response to said second signal; and means, having an input connected for response to said second signal and an output connected to the zero reset input of said up and down pulse counting means for supplying a zero reset signal thereto in immediate response to said second signal. 2. The device of claim 1, wherein said means, having a first input, a second input, and an output, for producing a first signal at the output thereof in response to a predetermined second signal being supplied to the first input thereof, and for producing a third signal that is different from said first signal at the output thereof in response to a predetermined fourth signal being supplied to the second input thereof comprises a bistable multivibrator. 3. The device of claim 1, wherein said means, having an up-count input, a down-count input, a zero reset input, and an output, with the output thereof connected to the aforesaid second input of said first and third signals producing means, for up-counting the pulses of a pulsed fifth signal being supplied to the up-count input thereof, for down-counting the pulses of said up-counted pulses in response to a pulsed sixth signal being supplied to the down-count input thereof, and for producing the aforesaid fourth signal immediately after the aforesaid down-counting of said up-counted pulses has been completed comprises a digital up-down counter. 4. The device of claim 1, wherein said means, having an up-count input, a down-count input, a zero reset input, and an output, with the output thereof connected to the aforesaid second input of said first and third signals producing means, for up-counting the pulses of a pulsed fifth signal being supplied to the up-count input thereof, for down-counting the pulses of said up-counted pulses in response to a pulsed sixth signal being supplied to the down-count input thereof, and for producing the aforesaid fourth signal immediately after the aforesaid down-counting of said up-counted pulses has been completed comprises a predetermined plurality of cascaded digital up-down counters. 5. The device of claim 1, wherein said means, having an up-count input, a down-count input, a zero reset input, and an output, with the output thereof connected to the aforesaid second input of said first and third signals producing means, for up-counting the pulses of a pulsed fifth signal being supplied to the up-count input thereof, for down-counting the pulses of said up-counted pulses in response to a pulsed sixth signal being supplied to the down-count input thereof, and for producing the aforesaid fourth signal immediately after the aforesaid down-counting of said up-counted pulses has been completed comprises a predetermined up-down counter. 6. The device of claim 1, wherein said means, having an up-count input, a down-count input, a zero reset input, and an output, with the output thereof connected to the aforesaid second input of said first and third signals producing means, for up-counting the pulses of a pulsed fifth signal being supplied to the up-count input thereof, for down-counting the pulses of said up-counted pulses in response to a pulsed sixth signal being supplied to the down-count input thereof, and for producing the aforesaid fourth signal immediately after the aforesaid down-counting of said up-counted pulses has been completed comprises a predetermined plurality of cascaded incremental up-down counters. 7. The device of claim 1, wherein said means, having an input and a pair of outputs, with the input thereof connected for response to the aforesaid predetermined second signal, and with the pair of outputs thereof respectively connected to the up-count and down-count inputs of the aforesaid up-counting and down-counting means, for respectively generating said pulsed fifth and sixth signals in response to said second comprises: a steering gate having a pair of inputs and a pair of outputs, with one of the inputs thereof connected for response to the aforesaid second signal, and with the pair of outputs thereof connected to the up and down count inputs of said up and down count pulsed counting means, respectively; and a clock generator connected to the other of said pair of inputs of the aforesaid steering gate. 8. The device of claim 1, wherein said means, having an input and a pair of outputs, with the input thereof connected for response to the aforesaid predetermined second signal, and with the pair of outputs thereof respectively connected to the up-count and down-count inputs of the aforesaid up-counting and down-counting means, for respectively generating said pulsed fifth and sixth signals in response to said first and third signal comprises: an inverter having an input and an output, with the input thereof connected for response to said second signal; a first NAND gate having a pair of inputs and an output, with one of the inputs thereof connected to the output of said inverter; a second NAND gate having a pair of inputs and an output, with one of the inputs thereof connected to the input of said inverter; and a clock signal generator connected to the other inputs of said first and second NAND gates. 9. The device of claim 1, wherein said means, having an input connected for response to said second signal and an output connected to the zero reset input of said up and down pulse counting means for supplying a zero reset signal thereto in immediate response to said second signal comprises a reset monostable multivibrator. 10. The device of claim 1, wherein said means, having an input and a pair of outputs, with the input thereof connected for response to the aforesaid predetermined second signal, and with the pair of outputs thereof respectively connected to the up-count and down-count inputs of the aforesaid up-counting and down-counting means, for respectively generating and supplying said pulsed fifth and sixth signals thereto in response to said second signal comprises a steering generator. 11. The invention of claim 10, wherein said steering generator comprises: a steering gate having a pair of inputs and a pair of outputs, with one of the inputs thereof connected for response to the aforesaid second signal, and with the pair of outputs thereof connected to the up and down count inputs of said up and down pulse counting means, respectively; and a clock generator connected to the other of said pair of inputs of the aforesaid steering gate. 12. A pulse-width doubler, comprising in combination: an input terminal; a bistable multivibrator having a data signal input, a borrow pulse input for the resetting thereof, and an output, with the data signal input thereof connected to said input terminal; an output terminal connected to the output of said bistable multivibrator; an inverter amplifier having an input and an output, with the input thereof connected to the aforesaid input terminal; a first NAND gate having a pair of inputs and a count-up output, with one of the inputs thereof connected to the output of said inverter amplifier; a second NAND gate having a pair of inputs and a count-down output, with one of the inputs thereof connected to the aforesaid input terminal; a clock generator having an output which is connected to the other inputs of the aforesaid first and second NAND gates; signal increments counter and storer means having an up-count input, a down-count input, a reset input, and a borrow pulse output, with the up-count input thereof connected to the up-count output of said first NAND gate, with the down-count input thereof connected to the down-count output of said second NAND gate, and with the borrow pulse thereof connected to the borrow pulse input of the aforesaid bistable multivibrator; and a reset monostable multivibrator having a data signal input and an output, with the data signal input thereof connected to the aforesaid input terminal, and with the output thereof connected to the reset input of said signal increments counter and storer means. 13. The device of claim 12, wherein said signal increments counter and storer means comprises at least one digital up-down counter having an up-count input, a down-count input, a reset input, and a borrow pulse output, with the up-count input thereof connected to the up-count output of said first NAND gate, with the down-count input thereof connected to the down-count output of said second NAND gate, with the reset input thereof connected to the output of said reset monostable multivibrator, and with the borrow pulse output thereof connected to the borrow pulse input of the aforesaid bistable multivibrator. 14. The device of claim 12, wherein said signal increments counter and storer means comprises a predetermined plurality of cascaded digital up-down counters. 15. The device of claim 12, wherein said signal increments counter and storer means comprises five series connected up-down counters.
