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A CMOS voltage multiplier circuit comprised of one or more multiplier cells each of said cells including two P-channel devices functioning as switching elements to connect a cell contained capacitance in parallel across a voltage supply during one half of a cycle and a single N-channel device for co

A CMOS voltage multiplier circuit comprised of one or more multiplier cells each of said cells including two P-channel devices functioning as switching elements to connect a cell contained capacitance in parallel across a voltage supply during one half of a cycle and a single N-channel device for connecting the capacitance in series with the supply during the other half of the cycle. An output stage is provided which includes a transfer device and a modified multiplier cell for driving the transfer device.

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A voltage multiplier circuit for producing an output which is a multiple of a supply voltage supplied thereto, comprising a first CMOS multiplier cell, said CMOS cell being comprised of: a pair of MOS devices of a first conductivity type; a single MOS device of a second conductivity type; and a capa

A voltage multiplier circuit for producing an output which is a multiple of a supply voltage supplied thereto, comprising a first CMOS multiplier cell, said CMOS cell being comprised of: a pair of MOS devices of a first conductivity type; a single MOS device of a second conductivity type; and a capacitance means for storing voltage; the source-drain conduction paths of said pair of MOS devices of the first conductivity type being serially connected with said capacitance means and said supply voltage such that said capacitance means lies between the source-drain conduction paths of said pair of MOS devices; the source-drain conduction path of said single MOS device of the second conductivity type being connected between a first terminal of said capacitance means and said supply voltage, such that when the conduction paths of said pair of MOS devices of the first conductivity type are conductive, the capacitance means is connected in parallel with said supply voltage and when said conduction path of said single MOS device of the second conductivity type is conductive said capacitance means is serially connected to said supply voltage.