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A solid state electronic circuit for controlling a reversible direct current motor from a voltage source such that it may be rotated in either direction. The reversible direct current motor is connected into a bridge circuit with semiconductor switching elements which provide that the full supply vo

A solid state electronic circuit for controlling a reversible direct current motor from a voltage source such that it may be rotated in either direction. The reversible direct current motor is connected into a bridge circuit with semiconductor switching elements which provide that the full supply voltage is available for starting in either direction. A pair of comparators receives input signals from a triangular wave generator and a signal source and in conjunction with a cross-fire protection circuit generates the drive pulses which control the semiconductor switching elements.

대표청구항 ▼

A pulse width modulating power amplifier for direct current motor control comprising: a signal source of input drive signals; generating means for producing simultaneous positive and negative waveforms; clockwise modulating means, having a first input connected to said signal source and a second inp

A pulse width modulating power amplifier for direct current motor control comprising: a signal source of input drive signals; generating means for producing simultaneous positive and negative waveforms; clockwise modulating means, having a first input connected to said signal source and a second input connected to said generating means, for producing clockwise drive pulses; counterclockwise modulating means, having a first input connected to said signal source and a second input connected to said generating means, for producing counterclockwise drive pulses; a silicon controlled rectifier power bridge having a first input connected to said clockwise modulating means, a second input connected to said counter-clockwise means, and having first and second outputs for providing a direct current of reversible polarity and wherein said silicon conrolled rectifier power bridge comprises: a power supply; a first switching transistor connected to said power supply; a second switching transistor connected to said power supply; a first silicon controlled rectifier connected to said first switching transistor; a second silicon controlled rectifier connected to said second switching transistor and said first silicon controlled rectifier so as to form a bridge circuit; a reversible direct current motor having first and second terminals, said first terminal connected to said first switching transistor and said second terminal connected to said switching transistor; a first diode connected in parallel to said first silicon controlled rectifier; a second diode connected in parallel to said second silicon controlled rectifier; a third switching transistor, connected to said second silicon controlled rectifier, said first switching transistor and said counterclockwise modulating means, and a fourth switching transistor connected to said first silicon controlled rectifier, said second switching transistor and said clockwise modulating means; and a cross-fire protection means having a first input connected to said clockwise modulating means, a second input connected to said counterclockwise modulating means, a third input connected to said first output of said silicon controlled rectifier power bridge means and a fourth input connected to said second output of said silicon controlled rectifier power bridge means for preventing the driving of said silicon controlled rectifier power bridge means to a short circuit condition and wherein said cross fire protection means comprises: a first NAND gate having first and second inputs, said first input connected to said counterclockwise modulating means and said second input connected to said first silicon controlled rectifier; a second NAND gate having first and second inputs, said first input connected to said clockwise modulating means and said second input connected to said second silicon controlled rectifier; a set reset flip-flop having not set and not reset inputs and having Q and not-Q outputs, said not set input connected to said second NAND gate and said not reset input connected to said first NAND gate; a first shunting transistor operatively connected to said counterclockwise modulating means, and to said Q-output of said set-reset flip-flop; and a second shunting transistor operatively connected to said first shunting transistor, said clockwise modulating means, and said not-Q output of said set reset flip-flop.