이 특허에 인용된 특허 (1) 인용/피인용 타임라인 분석

1. Miller Robert Lynn (Streamwood IL) Weisshappel Robert Neal (Sleepy Hollow IL), Dual modulus programmable counter.

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이 특허를 인용한 특허 (37) 인용/피인용 타임라인 분석

1. Sywyk Stefan P., Apparatus for generating an asynchronous status flag with defined minimum pulse.

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2. Nakajima Takeshi (Tokyo JPX), Battery saving signal generating circuit.

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3. Ott Russell G. (Cranford NJ), Circuit and method for duty cycle control.

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4. Taylor Mark (Houston TX), Circuit and method for performing equal duty cycle odd value clock division and clock synchronization.

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5. Gammel, John, Circuit device to generate a high precision control signal.

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6. Kotra, Prasad Rao, Clock circuit with self correcting duty cycle.

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7. Huffman Charles E. (Plano TX) Foust Jeffrey L. (Dallas TX), Clock divider circuit incorporating a J-K flip-flop as the count logic decoding means in the feedback loop.

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8. Rohleder, Michael; Koch, Thomas; Litovtchenko, Vladimir; Luedeke, Thomas, Clock glitch detection circuit.

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9. Lin, Chih-Chang; Yang, Tien-Chun; Swei, Steven, Counters and exemplary applications.

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10. Nortrup Kevin E. (Indianapolis IN), Digital envelope detection circuit.

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11. Vaughn Charles J. (Fremont CA), Digital pulse generator having a programmable pulse width and a pulse repetition interval.

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12. Roland Albert Bechade ; Ronald Joseph Cheponis, Digital signal multiplier.

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13. Lyle Robert L. (Knoxville TN), Duty cycle controller for horizontal synchronization signals in a television receiver.

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14. Malka Jacob H. (Fair Lawn NJ) Friedlander Mordechai (Chestnut Ridge NY), Frequency counter-locked-loop apparatus for controlling digitally programmable oscillators.

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15. Iijima Takashi (Tokyo JPX), Frequency divider of pulses using ring-counters.

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16. Hansen Kenneth A. (Bedford TX), Fully synchronized programmable counter with a near 50% duty cycle output signal.

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17. Mace, Philippe; Guitton, Xavier; Benezeth, Philippe, Generation method of a variable analogue signal generated by a PWM signal and system generating such a signal.

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18. Fukuta Masaru (Yokohama JPX), High speed presettable counter.

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19. Kim, Seok Yeon, Input circuit in high speed counter module in PLC.

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20. David E. O'Brien ; Timothy W. Sheen ; Marc R. Hutner ; Michael A. Mittelbrunn ; Abdelkebir Sabil, Low jitter phase-locked loop with duty-cycle control.

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21. Neyer Norbert (Zrich CHX), Method and an apparatus for generating periodic digital time function signals.

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22. Staiger Dieter E. (Weil im Schoenbuch DEX), Method and apparatus for generating pulses of a predetermined time relation within predetermined pulse intervals with a.

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23. Glaab Friedrich (Hochst DEX) Ritter Uwe (Darmstadt DEX) Sturm Rainer (Gross-Gerau DEX), Method and apparatus for transmission of synchronization signals between microprocessors in video system.

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24. Lo John M., One load conditional look ahead counter.

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25. Blair, Barry Olen; Fasullo, Gregory H.; Harvey, James Edward; Marabell, Donald, PWM control signal generation method and apparatus.

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26. Welguisz, David M.; Brady, Michael S., Programmable delay timer and method therefor.

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27. Palmquist Steven R. (Beaverton OR) Gaiser Ronald D. (Aloha OR), Programmable pulse generator.

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28. Hopkins Thomas L. R. (Scottsdale AZ), Programmable stepper motor controller.

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29. Lee Robert D. (Denton TX) Dias Donald R. (Carrollton TX), Programmable time base circuit with protected internal calibration.

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30. Werking Paul M. (Richardson TX), Programmable timing system.

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31. Boillat Pierre (Meyriez CHX), Restraining the instability of a stepper motor.

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32. Nishitani Kazuharu (Hyogo JPX), Semiconductor integrated circuit device responsive to clock signals having different amplitudes.

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33. Uchikoshi Gohji (Higashimurayama JPX), Signal conversion circuit.

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34. Vaughn Charles J. (Fremont CA), Signal generator for producing accurately timed pulse groupings.

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35. Takemura, Makoto; Shirotori, Toru, Timer device and electronic apparatus.

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36. Hassoun Joseph H., Variable clock divider with selectable duty cycle.

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37. Kawazoe Akio (Tokyo JPX), Voltage to pulse-width conversion circuit.

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