초록 ▼

A programmable control unit for disk memory and controller comprising a microprocessor (MPU), random access memory (RAM) used as a buffer to cache disk resident data used by a data processing system (DPS), and a configurable data path (CDP) which couples the DPS to the disk controller. The (MPU) is

A programmable control unit for disk memory and controller comprising a microprocessor (MPU), random access memory (RAM) used as a buffer to cache disk resident data used by a data processing system (DPS), and a configurable data path (CDP) which couples the DPS to the disk controller. The (MPU) is programmed to provide the DPS rapid access to disk resident data by so controlling the CDP as to maintain a memory cache of disk resident data in the RAM. Data is cached under either directed control via an application level task or operator console directive, or under dynamic control through which a predetermined number of successive blocks of data are read from the disk and stored in the RAM each time any one block is addressed, and once the RAM is full, by discarding from the RAM a block of data which the immediate history has shown is least useful.

대표청구항 ▼

A system for coupling a data processing system to a data storage subsytem comprising a random access memory and data transfer control means responsive to commands from said data processing system for preaccessing and transferring to said random access memory a predetermined amount of data resident i

A system for coupling a data processing system to a data storage subsytem comprising a random access memory and data transfer control means responsive to commands from said data processing system for preaccessing and transferring to said random access memory a predetermined amount of data resident in said data storage subsystem, and a configurable data path means connected to intercept said commands and adapted to respond to said commands for providing a data path between said data processing system and said data storage subsystem, between said data processing system and said random access memory, and between said random access memory and said data storage subsystem, as required by commands from said data processing system to said data storage subsystem intercepted by said configurable data path means, where said data transfer control means responds to intercepted commands for each requested access to said data storage subsystem for a block of data and controls accessing said random access memory for said block of data if previously transferred and still retained in said random access memory, and if not, controls accessing said data storage subsystem for transfer of said block of data both to said data processing system and to said random access memory simultaneously.