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Method of hermetically encapsulating a semiconductor device by laser irradiation 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/52
출원번호 US-0194108 (1980-10-06)
발명자 / 주소
  • Islam Safidul (Richardson TX)
출원인 / 주소
  • Texas Instruments Incorporated (Dallas TX 02)
인용정보 피인용 횟수 : 36  인용 특허 : 1

초록

A hermetic seal is formed without expensive precious metals by fusing two members of a semiconductor package together by scanning a laser beam along adjacent edges of the members. The compositions of the members which are fused together include ceramic, glass and metal. The method enables the format

대표청구항

A method of hermetically sealing a semiconductor chip within a package comprising: providing a first ceramic member having a plurality of conductive paths hermetically sealed therein; providing a plurality of electrically conductive leads for making external connections to the conductive paths; bond

이 특허에 인용된 특허 (1)

  1. Gordon Richard (Scarsdale NY) Ciallella John G. (White Plains NY), Ceramic lid assembly for hermetic sealing of a semiconductor chip.

이 특허를 인용한 특허 (36)

  1. Lamberson, Lisa A.; Morena, Robert M., Antimony-free glass, antimony-free frit and a glass package that is hermetically sealed with the frit.
  2. Lamberson, Lisa A.; Morena, Robert M., Antimony-free glass, antimony-free frit and a glass package that is hermetically sealed with the frit.
  3. Kiyoshi Takeuchi JP; Shirou Takigawa JP; Takahiko Kondou JP; Takashi Hosoya JP; Yasukuni Iwasaki JP; Koichi Abe JP, Apparatus and method for laser fusion bonding.
  4. Liu, Yachin; Ghosh, Amalkumar P.; Zimmerman, Steven M.; Heller, Christian M., Apparatus and method for solder-sealing an active matrix organic light emitting diode.
  5. Karam, Raymond Miller; Roussos, Georges, Attachment of a cap to a substrate-based device with in situ monitoring of bond quality.
  6. Kersch Dennis R. (Phoenix AZ) Mitchell Don E. (Phoenix AZ), Copper body power hybrid package and method of manufacture.
  7. Ma, Qing; Fujimoto, Harry H.; Towle, Steven; Evert, John E., Die-in-heat spreader microelectronic package.
  8. Aitken, Bruce G.; Carberry, Joel P.; DeMartino, Steven E.; Hagy, Henry E.; Lamberson, Lisa A.; Miller, II, Richard J.; Morena, Robert; Schroeder, III, Joseph F.; Streltsov, Alexander; Widjaja, Sujanto, Glass package that is hermetically sealed with a frit and method of fabrication.
  9. Aitken, Bruce G.; Carberry, Joel P.; DeMartino, Steven E.; Hagy, Henry E.; Lamberson, Lisa A.; Miller, II, Richard J.; Morena, Robert; Schroeder, III, Joseph F.; Streltsov, Alexander; Widjaja, Sujanto, Glass package that is hermetically sealed with a frit and method of fabrication.
  10. Aitken,Bruce G.; Carberry,Joel P.; DeMartino,Steven E.; Hagy,Henry E.; Lamberson,Lisa A.; Miller, II,Richard J.; Morena,Robert; Schroeder, III,Joseph F.; Streltsov,Alexander; Widjaja,Sujanto, Glass package that is hermetically sealed with a frit and method of fabrication.
  11. Carper Judd S. ; McIntyre David G., Hermetic seal for an electronic component having a secondary chamber.
  12. Hawtof,Daniel W.; Reddy,Kamjula Pattabhirami; Stone, III,John, Hermetically sealed package and method of fabricating of a hermetically sealed package.
  13. Robbins William L., Integrated circuit header assembly.
  14. Valentin Jean-Pascal (Povilley FRX) Maitre Pierre (Besancon PA FRX) Kazahaya Masahiro (Southampton PA), Laser welding technique.
  15. Asano, Hideki; Wada, Masanori, Light emitting device, cell for light emitting device, and method for manufacturing light emitting device.
  16. Bokil Delip R. (Winchester MA), Low internal temperature technique for hermetic sealing of microelectronic enclosures.
  17. Goodrich Gary B. (Cupertino CA) Belani Jadish G. (Cupertino CA), Low-cost semiconductor device package process.
  18. Haase Pastel, Michelle Nicole; Strines, Brian Paul, Mask and method for sealing a glass envelope.
  19. Pastel, Michelle Nicole Haase; Strines, Brian Paul, Mask and method for sealing a glass envelope.
  20. Palmateer, Lauren; Cummings, William J.; Gally, Brian; Chui, Clarence; Kothari, Manish, Method and system for packaging MEMS devices with glass seal.
  21. Sommerfeldt, Ralph; Moess, Eberhard, Method for closing a housing by means of an optical joining method.
  22. Wood,R. Andrew; Ridley,Jeffrey A.; Higashi,Robert E., Method for making a wafer-pair having sealed chambers.
  23. Glascock ; II Homer H. (Scotia NY), Method of bonding a silicon package for a power semiconductor device.
  24. Becken, Keith James; Logunov, Stephan Lvovich, Method of encapsulating a display element.
  25. Becken, Keith James; Logunov, Stephan Lvovich, Method of encapsulating a display element with frit wall and laser beam.
  26. Burger, Kurt; Friedrich, Heinz, Method of manufacturing corrosion-resistant measuring probes.
  27. Vu,Quat T.; Li,Jian; Towle,Steven, Microelectronic substrates with integrated devices.
  28. Suetsugu Kenichiro,JPX ; Yamaguchi Atsushi,JPX, Mounting method of semiconductor device.
  29. William G. Messelling ; Richard W. Geibel, Prevention of braze alloy flow and stopoff material therefor.
  30. Addington, Cary G.; Whittington, Shell Elaine; Mardilovich, Peter; Wren, William, Seal of fluid port.
  31. Bahl Inder J. (Roanoke VA) Griffin Edward L. (Roanoke VA), Semiconductor chip housing.
  32. Farnworth, Warren M., Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages.
  33. Farnworth, Warren M., Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages.
  34. Farnworth, Warren M., Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages.
  35. Farnworth, Warren M., Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages.
  36. R. Andrew Wood ; Jeffrey A. Ridley ; Robert E. Higashi, Wafer-pair having deposited layer sealed chambers.
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