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A multiprocessor computer system is distributed over error isolation areas, each of these areas containing a processor element, an encoder, a section of a memory and an information reconstruction section which are connected in this order in a cyclic path. The processor elements work in parallel on t

A multiprocessor computer system is distributed over error isolation areas, each of these areas containing a processor element, an encoder, a section of a memory and an information reconstruction section which are connected in this order in a cyclic path. The processor elements work in parallel on the same data word, which has a certain length. When the result of the processing has to be stored in the memory, each encoder forms a code symbol of shorter length, on the basis of the data word. The set of code symbols formed on the basis of the data word forms a code word with a larger bit length than the data word mentioned. By means of an error correcting code at least one erroneous code symbol in the code word can be corrected. The code symbols are stored in the respective memory sections. If the data word concerned has to be further processed, all corresponding code symbols are fed to all information reconstruction sections. Peripheral equipment can be connected in the cyclic path, with implementation of distinctive levels of redundancy.

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A multiprocessor computer system for processing data words, each word having k data symbols, said computer system comprising a plurality of n parallel operating and mutually synchronized computer modules, each computer module including a processor module for processing the data words and having a fi

A multiprocessor computer system for processing data words, each word having k data symbols, said computer system comprising a plurality of n parallel operating and mutually synchronized computer modules, each computer module including a processor module for processing the data words and having a first data input and a first data output, an encoder module fed by said first data output for receiving a processed data word and therefrom generating a code symbol on a second output, a local memory module fed by said encoder module for temporarily storing code symbols and having a third data output, and a data word reconstruction module for receiving a plurality of n code symbols for reconstructing therefrom a data word, said data word reconstruction module having a fourth data output connected to said first data input, said multiprocessor furthermore comprising an interconnection network connecting all said third data outputs to respective second data inputs of all respective data word reconstruction modules, wherein all data symbols and code symbols consist of a plurality of b bits, wherein the respective code symbols generated from one data word constitute an n-symbol code word, the set of code words having a code distance D as defined over the code symbols of at least three, and wherein the relation between n, D and k is given by D.k-(D-1)>n-(D-1)≥k≥2.