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|국가/구분||United States(US) Patent 등록|
|발명자 / 주소|
|출원인 / 주소|
|인용정보||피인용 횟수 : 27 인용 특허 : 1|
A data processing system including a central processing unit (CPU), a memory device operating on a data word length of 2 m-bits, an input/output device operating on a data word length of m bits, an m-bit register and a direct memory access (DMA) controller for transferring data words in both directions between the memory device and the input/output device independently of the CPU. A 2 m-bit bus is connected between the memory device and two m-bit buses connected to a bus switching circuit which controls the transfer of m-bit data words between the 2 m-bi...
An information transferring apparatus comprising: a first unit in which m-bit information is manipulated as a unit of handling, a first bus consisting of m bit signal lines, which is coupled to said first unit, a second unit in which 2 m-bit information is manipulated as a unit of handling, a second bus consisting of 2 m bit signal lines, which is coupled to said second unit, means for temporarily storing m bits of information, an information transfer circuit for transferring information between said first and second units, and coupled to said first bus,...