초록 ▼

Surge-current that occurs when the pair of input lines of a power supply are energized is limited by connecting the source-to-drain path of an insulated gate FET in series in one input line and connecting its gate to an intermediate node of a voltage divider that is connected across the input lines,

Surge-current that occurs when the pair of input lines of a power supply are energized is limited by connecting the source-to-drain path of an insulated gate FET in series in one input line and connecting its gate to an intermediate node of a voltage divider that is connected across the input lines, with an integrating capacitor connected between the node and one input line for reducing the rate of conduction of the FET. Overvoltage protection is provided by electrically connecting a latch circuit between the node and the one input line, with the FET\s gate being electrically connected to the collector of a latch transistor that has its base driven by an overvoltage indication. The series combination of a timing resistor and timing capacitor is connected across the primary conduction path of the FET and the base of a unijunction transistor that has its emitter directly connected to the junction of the resistor and capacitor and AC coupled to the base of the latch transistor. A prescribed time interval (set by charging the timing capacitor to the trigger voltage of the unijunction) after the latch is set by an overvoltage condition, the unijunction fires for discharging the timing capacitor and resetting the latch, and thus the power supply.

대표청구항 ▼

Apparatus responsive to an overvoltage indication from an overvoltage sensing circuit of a power supply for interrupting electrical connection of a pair of input lines that are connected between the power supply and a power source, comprising: first means having a primary conduction path thereof ele

Apparatus responsive to an overvoltage indication from an overvoltage sensing circuit of a power supply for interrupting electrical connection of a pair of input lines that are connected between the power supply and a power source, comprising: first means having a primary conduction path thereof electrically connected in series in one of the power supply input lines, said first means conducting substantial current in said primary conduction path in said one line in response to a prescribed control voltage of greater than a prescribed value applied to a control lead thereof; second means electrically connected across the input lines for developing said control voltage of greater than the prescribed value at a node therebetween when the input lines are connected to the power source; third means for electrically connecting said node to the control lead of said first means for causing the latter to conduct current through the power supply when the control voltage is greater than the prescribed value; and latch means electrically connected between said node and said one input line and having an input terminal connected to the overvoltage sensing circuit, said latch means being responsive to an overvoltage signal from said sensing circuit on said input terminal for decreasing the value of control voltage to much less than the prescribed value for cutting off said first means for causing said first means to block current flow in said one input line.