초록 ▼

In an impedance transformer circuit which is intended for capacitive voltage sources having a high output impedance, particularly for capacitor microphones, comprises two sequential amplifier stages with an overall gain of close to one. The output of the first amplifier stage having a large input im

In an impedance transformer circuit which is intended for capacitive voltage sources having a high output impedance, particularly for capacitor microphones, comprises two sequential amplifier stages with an overall gain of close to one. The output of the first amplifier stage having a large input impedance, and of itself, a high gain, is applied to the inverting input 2 of the second amplifier stage V2, which, of itself, again exhibits a high gain and whose output is fed back to its non-inverting input through at least one feedback loop containing the first amplifier as a resistor controlled by the capacitive transducer. Further, in AC current terms, the load resistor of the first amplifier stage is located between the inverting input and the non-inverting input of the second amplifier stage, and the reference potential “0”for the input and output AC voltage signals is not provided by any of the inverting or non-inverting inputs of the two amplifier stages.

대표청구항 ▼

An impedance transformer circuit for a capacitive voltage source comprising: a first amplifier stage having a high input impedance and gain, a load resistance, an output and two inputs; a second amplifier stage having a high gain, an output, an inverting input and a non-inverting input; and a refere

An impedance transformer circuit for a capacitive voltage source comprising: a first amplifier stage having a high input impedance and gain, a load resistance, an output and two inputs; a second amplifier stage having a high gain, an output, an inverting input and a non-inverting input; and a reference potential connection; said first stage output connected to said second stage inverting input, said second stage output connected in feedback connection to said second stage non-inverting input and to one of said first stage inputs, said load resistance being controlled by a capacitive voltage source connected between the other of said first stage inputs and said reference potential connection, said reference potential connection not being connected to any input of said first and second amplifier stages, and said load resistance of said first amplifier stage being connected between said inverting and non-inverting inputs of said second amplifier stage.