[특허]Multi-element circuit construction

[미국특허] Multi-element circuit construction 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H05K-001/14
출원번호	US-0499136 (1983-05-31)
발명자 / 주소	Smolley Robert (Porteughese Bend CA)
출원인 / 주소	TRW Inc. (Redondo Beach CA 02)
인용정보	피인용 횟수 : 61 인용 특허 : 7

초록 ▼

A packaging construction for electronic circuit package elements, such as printed circuit boards and integrated-circuit chip packages, to obviate the need for connector cables, back-panel wiring and similar techniques. Circuit packaging elements are interconnected through an interconnection medium that includes an insulated board with opening through it, and a number of connector elements in the form of compressible wads of conductive wire. The connector elements are disposed in selected openings in the insulated board and compressed into contact with contact areas formed on the circuit package elements. Shorter lead lengths and improved circuit operating speed are the principal results of the approach. In a three-dimensional construction employing the principles of the invention, chip packages are arranged in modules, and interconnections may be made between chip packages within each module, transversely between modules, and in a third direction between layers of modules. The construction provides direct interconnections without the use of solder, connector cables or multilayer circuit boards, and makes most effective use of high-speed integrated circuitry.

대표청구항 ▼

A three-dimensional integrated-circuit packaging construction, comprising: a plurality of integrated-circuit (IC) chip packages arrayed in parallel relationship with each other, each of said IC chip packages having input/output contact areas located on various faces of the package, and having edge contact areas; chip package interconnection means disposed between each adjacent pair of said IC chip packages, to establish desired electrical connections between the two, said IC chip packages and said chip package interconnection means together forming a first IC chip module; at least one additional IC chip module of similar construction to said first IC chip module; transverse chip module interconnection means disposed between said first and additional IC chip modules, and between any other adjacent pairs of IC chip modules, to establish selected connections between side edge contact areas of two modules, said transversely interconnected IC chip modules forming a first IC chip module layer; at least one additional IC chip module layer of similar construction to said first IC chip module layer; and chip module layer interconnection means disposed between said first and additional IC chip module layers, and between any other adjacent pairs of IC chip module layers, to establish selected connections between said IC chip module layers; whereby interconnections between IC chip packages may be made in any of three dimensions, and current path lengths within the interconnections are minimized.

이 특허에 인용된 특허 (7) 인용/피인용 타임라인 분석

Buchoff Leonard S. (Bloomfield NJ) Kosiarski Joseph P. (Englishtown NJ) Dalamangas Chris A. (Fort Lee NJ), Conductive elastomeric contacts and connectors.
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Honn ; James J. ; Stuby ; Kenneth P., Electrical package for LSI devices and assembly process therefor.
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Parks Howard L. (Woodland Hills CA) Kuronen John M. (Camarillo CA), Flexible connector cable.
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McIver Chandler H. (Tempe AZ), Integrated circuit package.
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Cutchaw John M. (7333 E. Virginia Scottsdale AZ 85257), Integrated circuit package and connector therefor.
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Gabrielian Henry (Newport Beach CA), Miniature electrical connector.
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Crepeau Philip C. (San Diego CA), Multilayer printed circuit board.
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이 특허를 인용한 특허 (61) 인용/피인용 타임라인 분석

Moshayedi Mark, Apparatus for stacking semiconductor chips.
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Smolley Robert (Porteuguese Bend CA), Backplane interconnection system.
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Potash Hanan (La Jolla CA), Backplane structure for a computer superpositioning scalar and vector operations.
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Goh, Jing S., Board on chip ball grid array.
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Yew Chee Kiang,SGX ; Eng Kian Teng,SGX ; Yang Ji Cheng,SGX, Bridging method of interconnects for integrated circuit packages.
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Yew Chee Kiang,SGX ; Swee Yong Khim,SGX ; Chan Min Yu,SGX ; Ong Pang Hup,SGX ; Coyle Anthony, Chip size integrated circuit package.
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Gates, Geoffrey William; Bumb, Jr., Frank E., Compliant interconnect assembly.
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Gonya, Stephen; Twigg, Kenn; Patterson, Jim, Conformal 3D non-planar multi-layer circuitry.
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Tokunaga,Takashi, Connector, mating connector and board-to-board connector assembly.
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James Douglas Wehrly, Jr., Contact member stacking system and method.
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Wehrly, Jr., James Douglas, Contact member stacking system and method.
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Beilin Solomon I. ; Chou William T. ; Kudzuma David ; Lee Michael G. ; Peters Michael G. ; Roman James J. ; Swamy Som S. ; Wang Wen-chou Vincent ; Moresco Larry L. ; Murase Teruo, Controlled impedance interposer substrate and method of making.
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Beilin Solomon I. ; Chou William T. ; Kudzuma David ; Lee Michael G. ; Peters Michael G. ; Roman James J. ; Swamy Som S. ; Wang Wen-chou Vincent ; Moresco Larry L. ; Murase Teruo, Controlled impedence interposer substrate.
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Marcellus Emerson C. (Pasadena TX), Crystal oscillator and method for mounting the same.
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Chan Boon Pew,SGX ; Eng Kian Teng,SGX, Double sided single inline memory module.
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Hopfer, III, Albert N.; Rachwalski, Thaddeus M.; Shedore, Charles J., Electrical connector.
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Lindeman Richard J. (Wood Dale IL), Electrical connectors.
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Lindeman Richard J. (Wood Dale IL) Zafar Saeed U. (Park Ridge IL), Electrical connectors.
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Lindeman Richard J. ; Allard Edward M., Electrical connectors.
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Hopfer ; III Albert Nicholas ; Lindeman Richard Jay, Electrical interconnects.
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Brodsky, William Louis; Colbert, John Lee; Hamilton, Roger Duane; Mikhail, Amanda Elisa Ennis; Plucinski, Mark David, Electrically connecting two substrates using a resilient wire bundle captured in an aperture of an interposer by a retention member.
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Brodsky, William Louis; Caletka, David V.; Gaynes, Michael Anthony; Markovich, Voya Rista, Enhanced electrical/mechanical connection for electronic devices.
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Daly C. David (Whitehouse Station NJ) Khoshnood Ben (Coral Springs FL), Fiber optic receiver and transceiver.
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Gonya, Stephen; Eiche, James Sean; Patterson, James; Twigg, Kenneth R., Fine line 3D non-planar conforming circuit.
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Burns,Carmen D.; Roper,David; Cady,James W., Flexible circuit connector for stacked chip module.
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Eng Kian Teng,SGX ; Chan Min Yu,SGX ; Goh Jing Sua,SGX ; Low Siu Waf,SGX, Flexible pin location integrated circuit package.
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Burns, Carmen D., High density integrated circuit module.
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Eichelberger Charles W. (Schenectady NY) Wojnarowski Robert J. (Ballston Lake NY), High density interconnect with high volumetric efficiency.
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Chen, Fung Leng; Yew, Chee Kiang; Ong, Pang Hup, High density internal ball grid array integrated circuit package.
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Yew Chee Kiang,SGX ; Eng Kian Teng,SGX ; Khoo Sian Yong,SGX ; Ser Bok Leng,SGX, High density single inline memory module.
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Gonya, Stephen; Patterson, Jim; Twigg, Kenn, High reliability fluid-tight low-profile electrically conductive interconnects for large scale frame attachment.
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Eng Kian Teng,SGX ; Chan Min Yu,SGX ; Goh Jing Sua,SGX ; Chan Boon Pew,SGX, Integrated circuit package and flat plate molding process for integrated circuit package.
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Smolley Robert (Porteuguese Bend CA), Integrated-circuit chip interconnection system.
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Brindle, Steven R.; Bumb, Jr., Frank E.; Burg, John S.; Chu, Kwang-Ho; Mathews, Alexander R.; Revell, Ronald K., Low contact force, dual fraction particulate interconnect.
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Hopfer ; III Albert N. (Park Ridge IL) Lindeman Richard J. (Wood Dale IL), Low-loss electrical interconnects.
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Howell Wayne John ; Kresge John Steven ; Stone David Brian ; Wilcox James Robert, Method and apparatus for directing the input/output connection of integrated circuit chip cube configurations.
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Brodsky,William Louis; Colbert,John Lee; Hamilton,Roger Duane; Mikhail,Amanda Elisa Ennis; Plucinski,Mark David, Method and apparatus for electrically connecting two substrates using a resilient wire bundle captured in an aperture of an interposer by a retention member.
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Yang Ji Cheng,SGX ; Sua Goh Jing,SGX, Method and apparatus for nondestructive inspection and defect detection in packaged integrated circuits.
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Eng Kian Teng,SGX ; Chan Min Yu,SGX ; Goh Jing Sua,SGX ; Low Siu Waf,SGX ; Chan Boon Pew,SGX ; Toh Tuck Fook,SGX ; Yew Chee Kiang,SGX ; Yee Pak Hong,SGX, Method for adhering and sealing a silicon chip in an integrated circuit package.
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Kian Teng Eng SG; Min Yu Chan SG; Jing Sua Goh SG; Siu Waf Low SG; Boon Pew Chan SG; Tuck Fook Toh SG; Chee Kiang Yew SG; Pak Hong Yee SG, Method for adhering and sealing a silicon chip in an integrated circuit package.
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Gonya, Stephen; Eiche, James Sean; Patterson, James; Twigg, Kenneth R., Method of producing a fine line 3D non-planar conforming circuit.
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Moden Walter L., Multichip module assembly having via contacts and method of making the same.
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Anilkumar Chinuprasad Bhatt ; William Louis Brodsky ; Benson Chan, Printed circuit board to module mounting and interconnecting structure and method.
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Khandros,Igor Y.; DiStefano,Thomas H., Semiconductor chip assemblies, methods of making same and components for same.
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Koichi Sugihara JP; Koichi Miyashita JP, Semiconductor package with sloped outer leads.
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Clements Ken (Santa Cruz CA), Semiconductor wafer array with electrically conductive compliant material.
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Hopfer Albert N. ; Allard Edward M., Socket assembly for electrical component.
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Sathe, Ajit V.; Wermer, Paul H., Solderless electronics packaging.
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Sathe,Ajit V.; Wermer,Paul H., Solderless electronics packaging and methods of manufacture.
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Horton Roald N. (Severna Park MD) Harris David B. (Columbia MD) Bourdelaise Robert A. (Crofton MD), Solderless printed wiring board module and multi-module assembly.
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Leong Chew Weng,SGX ; Yew Chee Kiang,SGX ; Chan Min Yu,SGX ; Ong Pang Hup,SGX ; Toh Jeffrey Tuck Fook,SGX ; Chan Boon Pew,SGX, Stacked double sided integrated circuit package.
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Burns, Carmen D.; Wilder, James G.; Dowden, Julian, Stacking system and method.
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Kennedy, John; Ludwig, David; Krutzik, Christian, Three-dimensional LADAR module with alignment reference insert circuitry comprising high density interconnect structure.
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Kennedy, John; Ludwig, David; Krutzik, Christian, Three-dimensional ladar module with alignment reference insert circuitry.
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Luzanov, Sergey, Vertical PCB surface mount inductors and power converters.
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Luzanov, Sergey, Vertical PCB surface mount inductors and power converters.
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Luzanov, Sergey, Vertical PCB surface mount inductors and power converters.
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Eng Kian Teng,SGX ; Yeow Lee Teck,SGX, Vertical ball grid array integrated circuit package.
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Kian Teng Eng SG; Lee Teck Yeow SG, Vertical ball grid array integrated circuit package.
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Gonya, Stephen; Iannon, Jesse, X-ray obscuration film and related techniques.
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Gonya, Stephen; Iannon, Jesse, X-ray obscuration film and related techniques.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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[미국특허] Multi-element circuit construction 원문보기