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Tape packages 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01R-009/00
  • H01L-023/40
  • H01L-023/48
출원번호 US-0587411 (1984-03-08)
발명자 / 주소
  • Butt Sheldon H. (Godfrey IL)
출원인 / 주소
  • Olin Corporation (New Haven CT 02)
인용정보 피인용 횟수 : 37  인용 특허 : 12

초록

The present invention is directed to Tape Packages adapted to house semiconductor devices. The packages comprise a base component having a cover component disposed thereon to form an enclosure to house the semiconductor. A tape lead frame is disposed between the base and the cover and has a pluralit

대표청구항

A tape package adapted to house an electronic component, comprising: a base component; a cover component disposed on said base component forming an enclosure to house said electronic component; a tape lead frame disposed between said base component and said cover component, said lead frame extending

이 특허에 인용된 특허 (12)

  1. Davis ; Jr. ; John M., Carrier for mounting a semiconductor chip.
  2. Ellis Stafford M. (West Sussex GB2) Keay James P. M. (Kent GB2), Clamp arrangements.
  3. Bonkohara Manabu (Tokyo JPX) Kasuga Hisao (Tokyo JPX), Framed lead assembly for a semiconductor device comprising insulator reinforcing strips supported by a frame and made in.
  4. Schermer Gijsbertus J. H. (Eindhoven NLX) Winters Hubertus H. A. (Eindhoven NLX) Hildering Willem C. (Eindhoven NLX) Nickl von Nikelsberg Karl F. (Eindhoven NLX), Hybrid circuit having a semiconductor circuit.
  5. Burns Carmen D. (San Jose CA), Integrated circuit packaging process.
  6. Koenig ; Paul W., Pressurizable semiconductor pellet assembly.
  7. Hutchison Robert V. (Valley Center CA) Nelson John A. (San Diego CA), Process of forming a plastic encapsulated molded film carrier CML package and the package formed thereby.
  8. Tsuzuki Naobumi (Tokyo JPX) Anazawa Shinzo (Tokyo JPX), Semiconductor device having a highly air-tight package.
  9. Sato Susumu (Tokyo JPX) Shiba Hiroshi (Tokyo JPX), Semiconductor device having bump terminal electrodes.
  10. Burns Carmen D. (San Jose CA), Tape operated semiconductor device packaging.
  11. Burns Carmen D. (San Jose CA), Tear strip planarization ring for gang bonded semiconductor device interconnect tape.
  12. Horvath Joseph L. (Poughkeepsie NY), Thermal conduction element for semiconductor devices.

이 특허를 인용한 특허 (37)

  1. Hodgson Rodney T. (Ossining NY) Jones Harry J. (Austin TX) Ledermann Peter G. (Pleasantville NY) Reiley Timothy C. (Ridgefield CT) Moskowitz Paul A. (Yorktown Heights NY), Balltape structure for tape automated bonding, multilayer packaging, universal chip interconnection and energy beam proc.
  2. Pryor Michael J. (Woodbridge CT) Shapiro Eugene (Hamden CT) Mahulikar Deepak (Meriden CT), Cermet substrate with spinel adhesion component.
  3. Brandenburg,Scott D.; Degenkolb,Thomas A.; Yeh,Shing, Compression connection for vertical IC packages.
  4. Matsumoto Kunio (Yokohama JPX) Oshima Muneo (Yokohama JPX) Sakaguchi Suguru (Chigasaki JPX), Connecting structure for electronic part and method of manufacturing the same.
  5. Isoda, Takeshi; Shinoda, Koji, Device module and method of manufacturing the same.
  6. Rooney James F. (Bethany CT) Cheskis Harvey P. (North Haven CT), Die set for the formation of cavities for metal packages to house electronic devices.
  7. Takahashi Yoshiharu,JPX ; Shinohara Toshiaki,JPX, Electronic component including conductor connected to electrode and anodically bonded to insulating coating.
  8. Takahashi Yoshiharu,JPX ; Shinohara Toshiaki,JPX, Electronic component with a lead frame and insulating coating.
  9. Takahashi Yoshiharu,JPX ; Shinohara Toshiaki,JPX, Electronic component with an insulating coating.
  10. Takahashi Yoshiharu,JPX ; Shinohara Toshiaki,JPX, Electronic component with anodically bonded contact.
  11. Frisch, Michael; Ehler, Ralf, Electronic module.
  12. Butt Sheldon H. (Godfrey IL) Voss Scott V. (Portola Valley CA), Heat dissipating interconnect tape for use in tape automated bonding.
  13. Voss Scott V. (Portola Valley CA), Heat dissipating interconnect tape for use in tape automated bonding.
  14. Butt Sheldon H. (Godfrey IL), Hermetic microminiature packages.
  15. Pryor Michael J. (Woodbridge CT) Eppler Richard A. (Cheshire CT) Smith ; III Edward F. (Madison CT) Butt Sheldon H. (Godfrey IL), Hermetically sealed semiconductor package.
  16. Bickford Harry R. (Ossining NY) Mok Lawrence S. (Yorktown Heights NY) Palmer Michael J. (Walden NY), High power, pluggable tape automated bonding package.
  17. Uemura, Toshiya, Light-emitting apparatus.
  18. Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL) Crane Jacob (Woodbridge CT) Pasqualoni Anthony M. (New Haven CT) Smith Edward F. (Madison CT), Metal electronic package.
  19. Pryor Michael J. (Woodbridge CT), Method for making multi-layer and pin grid arrays.
  20. Fox Leslie R. (Boxborough MA) Wade Paul C. (Shirley MA) Schmidt William L. (Acton MA), Method of cooling and powering an integrated circuit chip using a compliant interposing pad.
  21. Isoda, Takeshi; Shinoda, Koji, Method of manufacturing a device module.
  22. Takahashi Yoshiharu,JPX ; Shinohara Toshiaki,JPX, Method of manufacturing ball grid array electronic component.
  23. Takahashi Yoshiharu,JPX ; Shinohara Toshiaki,JPX, Method of manufacturing the electronic using the anode junction method.
  24. Fox Leslie R. (Boxborough MA) Wade Paul C. (Shirley MA) Schmidt William L. (Acton MA), Method of packaging and powering integrated circuit chips and the chip assembly formed thereby.
  25. Braden Jeffrey S. (Milpitas CA), Multi-layer lead frames for integrated circuit packages.
  26. Parthasarathi Arvind (North Branford CT), Multi-metal layer interconnect tape for tape automated bonding.
  27. Mori Toshihiko (Sagamihara JPX) Kubosono Kenji (Sagamihara JPX), Nickel based material for a semiconductor apparatus.
  28. Bayerer, Reinhold; Hohlfeld, Olaf; Stolze, Thilo, Power semiconductor module, power semiconductor module assembly and method for fabricating a power semiconductor module assembly.
  29. Walter Jackie A. (Sunnyvale CA) Sharenow Brett (Mt. View CA) Walker Robert (Saratoga CA) Voss Scott V. (Portola Valley CA), Process for providing an improved electroplated tape automated bonding tape and the product produced thereby.
  30. Smith ; III Edward F. (Madison CT), Sealing glass composite.
  31. Legen,Anton; Thomas,Jochen; Wennemuth,Ingo, Self-supporting connecting element for a semiconductor chip.
  32. Cherukuri Satyam C. (West Haven CT) Butt Sheldon H. (Godfrey IL), Semiconductor casing.
  33. Tadaoka, Akihiko, Semiconductor device.
  34. Crane Jacob (Woodbridge CT) Johnson Barry C. (Tucson AZ) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL), Semiconductor package.
  35. Butt Sheldon H. (Godfrey IL), Semiconductor packaging.
  36. Sponaugle Roger (Logan UT) Rainey Robert R. (North Ogden UT), Surface mount device with compensation for thermal expansion effects.
  37. Wakana, Yoshinori; Kamoshida, Masaru; Igarashi, Takeshi; Kanno, Kiyotaka, Waterproof component-suppressing electronic control device.
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