초록 ▼

A digital data link for communication between distributed components including at least two serial paths, a data path and a control path, and a port associated with each component, the ports serving to arbitrate link access requests, permit dialog with minimal addressing between components and promo

A digital data link for communication between distributed components including at least two serial paths, a data path and a control path, and a port associated with each component, the ports serving to arbitrate link access requests, permit dialog with minimal addressing between components and promote effective utilization of the data path bandwidth.

대표청구항 ▼

An asychronous digital data link for establishing communications among a plurality of components associated with the link, the link comprising at least two serial paths, a data path used for communicating data and a control path used for transmission of link access request signals, and a plurality o

An asychronous digital data link for establishing communications among a plurality of components associated with the link, the link comprising at least two serial paths, a data path used for communicating data and a control path used for transmission of link access request signals, and a plurality of ports, each port connected to an associated component and each port comprising: (a) a data receiver connected to the data path and the associated component to receive data from the data path and convey such data to the associated component; (b) a data transmitter connected to the data path and the associated component to convey data from the component and transmit the data to the data path when activated; (c) means connected to the link for generating an end of function signal indicating the end of a data communication; (d) means connected to the link for detecting an end of function signal; (e) a control transmitter connected to the control path for generating access request signals of at least one priority class on request of the associated component; (f) an arbitration unit connected to the control path consisting of (i) at least one register means for maintaining the number of pending bus access requests, and (ii) means for incrementing and decrementing said register means, in response to access request signals and end of function signals; and (g) a control unit connected to the arbitration unit, data receiver, data transmitter, control transmitter and associated component, the unit comprising: (i) enabling means connected to the register means of the arbitration unit for indicating to the associated component that, no other component has a pending request of higher priority and that, within its request signal class, no other component has an earlier request for bus access, and (ii) conveying means responsive to the enabling means for conveying data from the component to the transmitter for transmission to the data path.