초록 ▼

In accordance with the preferred embodiments of the invention, provided is a hermetic ceramic/glass enclosure for encapsulating semiconductor components which reduces the internal cavity moisture and contamination levels, has a stronger package seal and a lower sealing temperature than hermetic cera

In accordance with the preferred embodiments of the invention, provided is a hermetic ceramic/glass enclosure for encapsulating semiconductor components which reduces the internal cavity moisture and contamination levels, has a stronger package seal and a lower sealing temperature than hermetic ceramic/glass enclosures currently used. Included in the first embodiment is a lower substrate, with a conductive leadframe attached thereto via devitrified glass and a layer of vitreous glass on the leadframe for attaching a cap which also includes a layer of vitreous glass. To seal the enclosure, the cap is heated to a temperature T1 above the melting point of the vitreous glass, and the lower substrate, is maintained at a temperature high enough to bond to the vitreous layer on the cap on contact, but low enough to eliminate damage to the semiconductor component and additional Gold-Silicon eutectic formation between the semiconductor component and the enclosure lower substrate. In a second embodiment, the cap includes heat treated vitreous glass that reduces contamination outgassing during the final enclosure seal process and a gettering pad disposed on the interior surface of the cap for gettering residual moisture from the internal cavity of the enclosure. A third embodiment is also provided which is especially adapted for high pin-count packages, and includes a windowframe on the top of and attached to the leadframe by devitrified glass. The windowframe has a layer of vitreous glass to facilitate final enclosure seal and a reduction in the seal area required.

대표청구항 ▼

An enclosure for encapsulating an electronic component comprising: a substrate having a perimeter; a composite layer over said substrate, said layer having a first glass portion which is devitrified and is located over at least a part of said substrate and a second glass portion which is vitreous an

An enclosure for encapsulating an electronic component comprising: a substrate having a perimeter; a composite layer over said substrate, said layer having a first glass portion which is devitrified and is located over at least a part of said substrate and a second glass portion which is vitreous and is located above said first glass portion; a conductive lead frame attached to said substrate and imbedded in said composite layer on said substrate, said lead frame having surfaces exposed for electrical contact both within and without the perimeter of said substrate.