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Vacuum load lock apparatus 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C23C-014/00
출원번호 US-0588027 (1984-03-09)
발명자 / 주소
  • Mirkovich Ninko T. (Novato CA) Zajac John (San Jose CA)
출원인 / 주소
  • Tegal Corporation (Novato CA 02)
인용정보 피인용 횟수 : 39  인용 특허 : 5

초록

A multi-wafer load lock apparatus for use in wafer processing machines provides access to wafers in an internal cassette by orthogonal wafer transport devices. Upper and lower bell jars, which seal to a sealing plate, provide access to the cassette by outside and vacuum transport mechanisms, respect

대표청구항

A load lock apparatus comprising: a plate having a central aperture and vents for connecting said aperture to an evacuation system; a lower bell jar adapted to seal to said plate around said aperture; an upper ball jar adapted to seal to said plate around said aperture; and a wafer cassette adapted

이 특허에 인용된 특허 (5)

  1. Uehara Akira (Yokohama JPX) Kiyota Hiroyuki (Hiratsuka JPX) Miyazaki Shigekazu (Sagamihara JPX) Nakane Hisashi (Kawasaki JPX), Apparatus for automatic semi-batch sheet treatment of semiconductor wafers by plasma reaction.
  2. Flint Alan G. (Los Gatos CA), Apparatus for handling and treating wafers.
  3. Uehara Akira (Yokohama JPX) Nakane Hisashi (Kawasaki JPX), Apparatus for the treatment of a wafer by plasma reaction.
  4. Juday Thomas W. (New Berlin WI), Impregnation of metal castings.
  5. Mack Alfred (Poughkeepsie NY) O\Neill Brian C. (Millbrook NY) Penzetta Fred L. (Wappingers Falls NY), Low shock transmissive antechamber seal mechanisms for vacuum chamber type semi-conductor wafer electron beam writing ap.

이 특허를 인용한 특허 (39)

  1. Arii Katsuyuki (Tama JPX), Apparatus for loading and unloading a vacuum processing chamber.
  2. Pannese, Patrick D., Applications of neural networks.
  3. Kawata Hideaki (Tokyo JPX) Azuma Yusaku (Kanagawa JPX) Kuroki Kenzi (Ibaraki JPX) Shigematsu Osamu (Ibaraki JPX), Automatic article feeding apparatus.
  4. Boris Fishkin ; Seiji Sato ; Robert B. Lowrance, Controlled environment enclosure and mechanical interface.
  5. Fishkin Boris ; Sato Seiji ; Lowrance Robert B., Controlled environment enclosure and mechanical interface.
  6. Welch, Michael D.; Shan, Homgqing; Luscher, Paul E.; Lee, Evans Y.; Carducci, James D.; Salimian, Siamak, Double slit-valve doors for plasma processing.
  7. Theriault Victor J. ; Ives Mark, Dual plate gas assisted heater module.
  8. White, John M.; Verplancken, Donald; Kurita, Shinichi, Electronic device manufacturing chamber method.
  9. Wytman Joe, High vacuum dual stage load lock and method for loading and unloading wafers using a high vacuum dual stage load lock.
  10. Wytman Joe, High vacuum dual stage load lock and method for loading and unloading wafers using a high vacuum dual stage load lock.
  11. Aschner Helmut,DEX ; Merkle Helmut,DEX ; Walk Ulrich,DEX ; Zernickel Dieter,DEX, Inflatable elastomeric element for rapid thermal processing (RTP) system.
  12. Davis Cecil J. (Greenville TX) Matthews Robert (Plano TX) Bowling Robert A. (Garland TX), Integrated circuit processing system.
  13. Drage David J. (Sebastopol CA) Lachenbruch Roger B. (Sausalito CA) Drake ; Jr. Herbert G. (San Rafael CA) Peavey Jerris H. (Novato CA), Magnetically coupled wafer lift pins.
  14. Eror Miroslav (Old Tappan NJ) Biehl Richard E. (Pearl River NY), Method and apparatus for handling and processing wafer-like materials.
  15. Mitchell, Robert J. C.; Relleen, Keith D.; Ruffell, John, Method and apparatus for processing wafers.
  16. Robert J. C. Mitchell GB; Keith D. Relleen GB; John Ruffell, Method and apparatus for processing wafers.
  17. Pannese, Patrick D.; Kavathekar, Vinaya; van der Meulen, Peter, Methods and systems for controlling a semiconductor fabrication process.
  18. Pannese, Patrick D.; Kavathekar, Vinaya; van der Meulen, Peter, Methods and systems for controlling a semiconductor fabrication process.
  19. Pannese, Patrick D.; Kavathekar, Vinaya; van der Meulen, Peter, Methods and systems for controlling a semiconductor fabrication process.
  20. Pannese, Patrick D.; Kavathekar, Vinaya; van der Meulen, Peter, Methods and systems for controlling a semiconductor fabrication process.
  21. Pannese, Patrick D.; Kavathekar, Vinaya; van der Meulen, Peter, Methods and systems for controlling a semiconductor fabrication process.
  22. Pannese, Patrick D.; Kavathekar, Vinaya; van der Meulen, Peter, Methods and systems for controlling a semiconductor fabrication process.
  23. Pannese, Patrick D.; Kavathekar, Vinaya; van der Meulen, Peter, Methods and systems for controlling a semiconductor fabrication process.
  24. Boitnott Charles A. ; Caughran James W. ; Egbert Steve, Modular process system.
  25. Pfeiffer Ken ; Verdict Greg, Modular substrate cassette.
  26. van der Meulen, Peter, Semiconductor manufacturing systems.
  27. Boitnott Charles A. ; Caughran James W. ; Egbert Steve, Semiconductor wafer processing carousel.
  28. Lenz Eric Howard ; Dawson Keith Edward, Single-piece gas director for plasma reactors.
  29. Foley Michael S. (Beverly MA), Substrate handling system.
  30. Kroeker Tony R., Three chamber load lock apparatus.
  31. Kroeker Tony R., Three chamber load lock apparatus.
  32. Tony R. Kroeker, Three chamber load lock apparatus.
  33. Kurita, Shinichi; Beer, Emanuel; Nguyen, Hung T.; Blonigan, Wendell T., Transfer chamber for vacuum processing system.
  34. Kurita,Shinichi; Beer,Emanuel; Nguyen,Hung T.; Blonigan,Wendell T., Transfer chamber for vacuum processing system.
  35. Godot, Erwan, Transport pod interface.
  36. Ramsay, Bruce Gordon, Vacuum chamber load lock structure and article transport mechanism.
  37. Ramsay, Bruce Gordon, Vacuum chamber load lock structure and article transport mechanism.
  38. Powell, Earl G., Vacuum processing system for producing components.
  39. Powell, Earl G., Vacuum processing system for producing components.
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