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Generating storage reference instructions in an optimizing compiler 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-001/00
출원번호 US-0697675 (1985-02-04)
발명자 / 주소
  • Chaitin Gregory J. (Yorktown Heights NY) Hopkins Martin E. (Chappaqua NY) Markstein Peter W. (Yorktown Heights NY) Warren
  • Jr. Henry S. (Ossining NY)
출원인 / 주소
  • International Business Machines Corporation (Armonk NY 02)
인용정보 피인용 횟수 : 28  인용 특허 : 2

초록

A method for improving the quality of code generated by a compiler in terms of execution time, object code space, or both. The method is applicable to computers that have a redundancy of instructions, in that the same operation exists in forms that operate between registers, between main storage loc

대표청구항

A method for use in an optimizing compiler for generating code for subsequent machine execution which is more efficient in terms of storage references, said method comprising, first generating intermediate code that completely avoids the SR, RS and SS instructions for arithmetic-like data, said code

이 특허에 인용된 특허 (2)

  1. Saad Henry Y. (San Jose CA) Tindall William N. J. (San Martin CA), Optimizing cobol object code instruction path length with respect to perform statements.
  2. Rizzi John R. (San Jose CA), Register allocation system using recursive queuing during source code compilation.

이 특허를 인용한 특허 (28)

  1. Corrigan Colleen M. (Chicago IL) Hunter Lawrence W. (Austin TX) Modry John A. (Rochester MN), Apparatus and method for extracting documentation text from a source code program.
  2. Townsend Arthur R., Assembly language translator.
  3. Munshi Ashfaq A. (San Jose CA) Schimpf Karl M. (Santa Cruz CA), Compilation using two-colored pebbling register allocation method such that spill code amount is invariant with basic bl.
  4. Kawahito, Motohiro; Komatsu, Hideaki, Compiler device, method, program and recording medium.
  5. Kawahito,Motohiro; Komatsu,Hideaki, Compiler device, method, program and recording medium.
  6. Aizikowitz Nava E.,ILX ; Bar-Haim Roy N.,ILX ; Edelstein Orit,ILX ; Prosser Edward Curtis ; Roediger Robert Ralph, Cooperation of global and local register allocators for better handling of procedures.
  7. Kunz, Robert C.; Dahl, Peter J., Determining maximum number of live registers by recording relevant events of the execution of a computer program.
  8. Verbitsky,George, Expanding a software program by insertion of statements.
  9. Tonomura Motonobu (Kodaira JPX), Information processing system having smart memories.
  10. Pieper, John Samuel; Hobbs, Steven Orodon; Root, Stephen Corridon, Insertion of prefetch instructions into computer program code.
  11. Odnert Daryl (Boulder Creek CA) Santhanam Vatsa (Sunnyvale CA), Method and apparatus for compiling computer programs with interprocedural register allocation.
  12. Ravichandran Hari K., Method and apparatus for dynamically optimizing an executable computer program using input data.
  13. Stephenson,David L.; Lo,Raymond; Chan,Sun; Ho,Wilson; Murthy,Chandrasekhar, Method and computer program product for precise feedback data generation and updating for compile-time optimizations.
  14. Radigan Jim J., Method for determining the set of variables that may be ambiguously defined at a point in a computer program.
  15. Radigan Jim J., Method for identifying partial redundancies in a new processor architecture.
  16. Radigan Jim J., Method for identifying partial redundancies in existing processor architectures.
  17. Radigan Jim J., Method for optimizing a loop in a computer program by speculatively removing loads from within the loop.
  18. Liu Kin-Yip ; Shoemaker Ken ; Hammond Gary ; Pai Anand ; Yellamilli Krishna, Method for scheduling a flag generating instruction and a subsequent instruction by executing the flag generating instruction in a microprocessor.
  19. Marsden Simon David,GBX, Method of carrying out computer operations.
  20. Wakatani Akiyoshi,JPX, Method of compiling a loop.
  21. Megiddo Nimrod ; Sarkar Vivek, Method of, system for, and computer program product for minimizing loop execution time by optimizing block/tile sizes.
  22. Kaneko Masakatsu,JPX ; Aoki Shinji,JPX, Off-line teaching method and apparatus for the same.
  23. Cosentino Patrick A. (Scottsville NY) Shea Amy L. (Rochester NY) Haefner Michael E. (Honeoye NY) Ziegler Douglas V. (Rochester NY) Murphy Thomas E. (Rochester NY) Bubie Walter C. (Rochester NY), Process for producing human-computer interface prototypes.
  24. Aizikowitz Nava Arela,ILX ; Asnash Liviu,ILX ; Bar-Haim Roy,ILX ; Prosser Edward Curtis ; Roediger Robert Ralph ; Schmidt William Jon, Register allocation method and apparatus for gernerating spill code as a function of register pressure compared to dual.
  25. Hirotani Yoshiaki,JPX, Register optimizing compiler using commutative operations.
  26. Nobuki Tominaga JP; Akira Tanaka JP; Seiichi Urushibara JP, Resource allocation device for reducing the size and run time of a machine language program.
  27. MacLeod Andrew Wilfred,CAX, System for local context spilling for graph coloring register allocators.
  28. Verbitsky,George, Use of different color sequences for variables of different sizes and different semantics.
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