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Heatsink package for flip-chip IC 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/34
출원번호 US-0937414 (1986-12-03)
우선권정보 JP-0218301 (1986-09-17)
발명자 / 주소
  • Sugimoto Masahiro (Yokosuka JPX) Wakasugi Yasumasa (Kawasaki JPX) Harada Shigeki (Kawasaki JPX)
출원인 / 주소
  • Fujitsu Limited (Kawasaki JPX 03)
인용정보 피인용 횟수 : 71  인용 특허 : 7

초록

A semiconductor device comprises a substrate, a semiconductor element mounted on the substrate, a cap having an opening smaller than the external size of the semiconductor element for covering the semiconductor element to provide a hermetic seal, and a heatsink member mounted on the cap to cover the

대표청구항

A semiconductor device comprising: a substrate having at least one wiring layer formed on a top surface thereof; at least one semiconductor element mounted with a top face thereof downward on said substrate and electrically coupled to said wiring layer; a cap having at least one opening which is sma

이 특허에 인용된 특허 (7)

  1. Kohara, Masanobu; Nakao, Shin; Shibata, Hiroshi, Dimensionally stable semiconductor device.
  2. Lee James C. K. (Los Altos Hills CA), Integrated circuit packaging systems with double surface heat dissipation.
  3. Honda Norio (Kawasaki JPX) Sugahara Takehisa (Kawasaki JPX), Semiconductor device.
  4. Hamano Toshio (Yokohama JPX) Tachibana Kaoru (Yokohama JPX) Aoki Hideji (Machida JPX), Semiconductor device having soldered bond between base and cap thereof.
  5. Joshi ; Kailash Chandra, Studded heat exchanger for integrated circuit package.
  6. Horvath Joseph L. (Poughkeepsie NY), Unitary slotted heat sink for semiconductor packages.
  7. Schuck David B. (Escondido CA), VLSI Packaging system.

이 특허를 인용한 특허 (71)

  1. Puzella, Angelo M.; Dupuis, Patricia S.; Lemmler, Craig C.; Bozza, Donald A.; Bellahrossi, Kassam K.; Robbins, James A.; Francis, John B., Active electronically scanned array (AESA) card.
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  3. Crane ; Jr. Stanford W. ; Larcomb Daniel ; Krishnapura Lakshminarasimha, Apparatus for and method of manufacturing a semiconductor die carrier.
  4. Crane, Jr., Stanford W.; Larcomb, Daniel; Krishnapura, Lakshminarasimha, Apparatus for and method of manufacturing a semiconductor die carrier.
  5. Barrett Joseph C., Apparatus for dissipating heat from a conductive layer in a circuit board.
  6. Moshayedi Mark, Apparatus for stacking semiconductor chips.
  7. Paquette, Jeffrey; Cheyne, Scott R.; Ellsworth, Joseph R., Assembly to provide thermal cooling.
  8. Crane, Jr., Stanford W.; Portuondo, Maria M.; Erickson, Willard; Bizzarri, Maurice, Backplane system having high-density electrical connectors.
  9. Crane, Jr.,Stanford W., Backplane system having high-density electrical connectors.
  10. Mahulikar Deepak ; Hoffman Paul R. ; Braden Jeffrey S., Ball grid array electronic package.
  11. Puzella, Angelo M.; Upton, Jeffrey C.; Vargas, Arsenio; Nguyen, Steven D.; Bellahrossi, Kassam K., Calibration system and technique for a scalable, analog monopulse network.
  12. Brandenburg, Scott D.; Myers, Bruce A., Circuit assembly with surface-mount IC package and heat sink.
  13. Crane ; Jr. Stanford W. ; Portuondo Maria M. ; Erickson Willard ; Bizzarri Maurice, Computer having a high density connector system.
  14. Crane ; Jr. Stanford W. ; Portuondo Maria M. ; Erickson Willard ; Bizzarri Maurice, Computer system having a modular architecture.
  15. Crane ; Jr. Stanford W. ; Portuondo Maria M. ; Cruz Edward V. ; Razo Vincent R. ; Fynn Shaun, Computer system having a motorized door mechanism.
  16. Crane ; Jr. Stanford W. (Boca Raton FL) Portuondo Maria M. (Boca Raton FL) Cruz Edward V. (Newbury Park CA) Razo Vincent R. (Granada Hills CA) Fynn Shaun (West Hollywood CA), Computer with two fans and two air circulation areas.
  17. James Douglas Wehrly, Jr., Contact member stacking system and method.
  18. Wehrly, Jr., James Douglas, Contact member stacking system and method.
  19. Danello, Paul A.; Cheyne, Scott R.; Ellsworth, Joseph R.; Tellinghuisen, Thomas J., Cooling active circuits.
  20. Cheyne, Scott R.; Paquette, Jeffrey; Ackerman, Mark, Cooling of coplanar active circuits.
  21. Vinciarelli, Patrizio; LaFleur, Michael B., Electric terminal.
  22. Vinciarelli, Patrizio; LaFleur, Michael B., Electric terminal.
  23. Vinciarelli, Patrizio; LaFleur, Michael B., Electric terminal.
  24. Vinciarelli, Patrizio; LaFleur, Michael B., Electric terminal.
  25. Vinciarelli, Patrizio; LaFleur, Michael B., Electric terminal.
  26. Takeda Yukio (Hitachi JPX) Ogihara Satoru (Hitachi JPX), Electrical insulating, sintered aluminum nitride body having a high thermal conductivity and process for preparing the s.
  27. Crane ; Jr. Stanford W., Electrical interconnect system with wire receiving portion.
  28. Baker Don L. (Johnson City NY) Funari Joseph (Vestal NY) Otto William F. (Rochester MN) Sammakia Bahgat G. (Johnson City NY) Stutzman Randall J. (Vestal NY), Electronic assembly with enhanced heat sinking.
  29. Burns,Carmen D.; Roper,David; Cady,James W., Flexible circuit connector for stacked chip module.
  30. Aihara Toshio,JPX ; Tasaka Masahito,JPX ; Hayashi Chihiro,JPX, Heat sink having good heat dissipating characteristics.
  31. Paquette, Jeffrey; Cheyne, Scott R.; Ellsworth, Joseph R.; Martinez, Michael P.; Trahan, Michael R., Heat sink interface having three-dimensional tolerance compensation.
  32. Polese Frank J. ; Rubin Jack A. ; Singer Michael J. ; Chichra Walter V. ; Grodio Anthony P. ; Ocher Vlad ; Escalante Henry ; Dixon William ; Rose David L. ; Weinshanker Stuart, Heat-dissipating aluminum silicon carbide composite manufacturing method.
  33. Burns, Carmen D., High density integrated circuit module.
  34. Crane ; Jr. Stanford W., High-density electrical interconnect system.
  35. Crane ; Jr. Stanford W., High-density electrical interconnect system.
  36. Crane ; Jr. Stanford W. (3934 NW. 57th St. Boca Raton FL 33496), High-density electrical interconnect system.
  37. Crane, Jr., Stanford W., High-density electrical interconnect system.
  38. Barnes, Mark A.; Gilbert, Charles G.; Fluhler, Herbert U.; Schantz, Hans G.; Nag, Soumya K.; Dickson, David M., Impulse radar antenna array and method.
  39. Stierman Roger J. (Richardson TX) Heinen K. Gail (Dallas TX) Ramsey Thomas (Garland TX) Haefling James F. (Richardson TX), Insulated substrate for flip-chip integrated circuit device.
  40. Mosley Joseph M. ; Portuondo Maria M. ; Taylor Drew L., Low profile semiconductor die carrier.
  41. Smith, John Stephen, Method and apparatus for fabricating self-assembling microstructures.
  42. Smith, John Stephen, Method and apparatus for fabricating self-assembling microstructures.
  43. Barnes, Mark A.; Nag, Soumya K.; Fluhler, Herbert U., Method of envelope detection and image generation.
  44. Crane ; Jr. Stanford W. ; Portuondo Maria M., Method of manufacturing a semiconductor chip carrier.
  45. Crane, Jr., Stanford W., Modular architecture for high bandwidth computers.
  46. Ellsworth, Joseph R.; Martinez, Michael P.; McCordic, Craig H.; Paquette, Jeffrey; Cheyne, Scott R., Modular architecture for scalable phased array radars.
  47. Ellsworth, Joseph R.; Martinez, Michael P.; McCordic, Craig H.; Paquette, Jeffrey; Cheyne, Scott R., Modular architecture for scalable phased array radars.
  48. McShane Michael B. (Austin TX), Molded electronic package with compression structures.
  49. Crane ; Jr. Stanford W. ; Krishnapura Lakshminarasimha ; Li Yun ; Behar Moises ; Fuoco Dan ; Ahearn Bill, Multi-chip module having interconnect dies.
  50. Crane ; Jr. Stanford W. ; Krishnapura Lakshminarasimha ; Li Yun ; Behar Moises ; Fuoco Dan ; Ahearn Bill, Multi-chip module having interconnect dies.
  51. Carlson Randolph S. (Carson City NV), Packaging system for stacking integrated circuits.
  52. Carlson Randolph S. (Carson City NV) Chase Charles P. (Carson City NV), Packaging system for stacking integrated circuits.
  53. Puzella, Angelo M; Licciardello, Joseph A.; Dupuis, Patricia S.; Francis, John B.; Komisarek, Kenneth S.; Bozza, Donald A.; Alm, Roberto W., Panel array.
  54. Crane ; Jr. Stanford W. ; Portuondo Maria M. ; Erickson Willard ; Bizzarri Maurice, Passive backplane capable of being configured to a variable data path width corresponding to a data size of the pluggab.
  55. Crane, Jr., Stanford W.; Portuondo, Maria M., Prefabricated semiconductor chip carrier.
  56. Crane, Jr., Stanford W.; Portuondo, Maria M., Prefabricated semiconductor chip carrier.
  57. Stanford W. Crane, Jr. ; Maria M. Portuondo, Prefabricated semiconductor chip carrier.
  58. Aihara Toshio,JPX ; Tasaka Masahito,JPX ; Hayashi Chihiro,JPX, Process for producing heat sink having good heat dissipating characteristics.
  59. Pozgay, Jerome H., RF feed network for modular active aperture electronically steered arrays.
  60. Puzella, Angelo M.; Crowder, Joseph M.; Dupuis, Patricia S.; Fallica, Michael C.; Francis, John B.; Licciardello, Joseph A., Radio frequency interconnect circuits and techniques.
  61. Puzella, Angelo M.; Tsai, Tunglin L.; Francis, John B.; Bozza, Donald A.; Scott, Kathe I.; Dupuis, Patricia S., Scalable, analog monopulse network.
  62. Bartelink Dirk J. (13170 La Cresta Dr. Los Altos Hills CA 94022), Self-aligning integrated circuit assembly.
  63. Crane, Jr., Stanford W.; Portuondo, Maria M., Semiconductor chip carrier affording a high-density external interface.
  64. Crane, Jr.,Stanford W.; Portuondo,Maria M., Semiconductor chip carrier affording a high-density external interface.
  65. Crane ; Jr. Stanford W. ; Portuondo Maria M., Semiconductor chip carrier including an interconnect component interface.
  66. Zenzo Oda JP; Tadashi Komiyama JP; Toshinori Nakayama JP; Osamu Omori JP, Semiconductor device and method for manufacturing the same.
  67. Saito, Takashi, Semiconductor device with an interposer.
  68. Mosley Joseph M. ; Portuondo Maria M., Semiconductor die carrier having a dielectric epoxy between adjacent leads.
  69. Crane ; Jr. Stanford W. ; Krishnapura Lakshminarasimha, Semiconductor die package for mounting in horizontal and upright configurations.
  70. Burns, Carmen D.; Wilder, James G.; Dowden, Julian, Stacking system and method.
  71. Puzella, Angelo M.; Bozza, Donald A.; Robbins, James A.; Francis, John B., Transmit/receive daughter card with integral circulator.
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