초록

A convolution arithmetic circuit has an accumulator to multiply two digital data sequences and add up the products. The sequences are stored in memories which cycle at the same rates and with different scales, the memory containing the multiplicand data being periodically updated.

대표청구항 ▼

A convolution arithmetic circuit for performing convolution processing on an input sequence composed of a series of values obtained at a sampling frequency, said convolution processing also using a response sequence composed of a predetermined number of elements, said convolution arithmetic circuit

A convolution arithmetic circuit for performing convolution processing on an input sequence composed of a series of values obtained at a sampling frequency, said convolution processing also using a response sequence composed of a predetermined number of elements, said convolution arithmetic circuit comprising: a first memory that store said elements of said response sequence in a predetermined order; a second memory means for storing that stores said input sequence values; a scale of N counter, response to a clock signal, said scale of N counter providing a first series of count values which serve as addresses for said first memory, where N is an integer indicating said predetermined number sequence elements in said response sequence; a scale of N/a counter, also responsive to said clock signal, for providing a second series of count values which serve as addresses for said memory, where a is an integer divisor of N chosen according to said sampling frequency; accumulating means, coupled to said first and second memories, for computing a sum of a series of products of elements of said response sequence from said first memory and corresponding values of said input sequence from said second memory; and control means, coupled to said scale of N counter, for generating a control signal to alter the order of the second series of count values provided by said scale of N/a counter.