초록 ▼

An integrated circuit power timer having a power field effect transistor and a versatile timing circuit all on one integrated circuit is provided. The integrated circuit has built in thermal and current limit protection and provides a fault indicator in case of an over current or an over temperature

An integrated circuit power timer having a power field effect transistor and a versatile timing circuit all on one integrated circuit is provided. The integrated circuit has built in thermal and current limit protection and provides a fault indicator in case of an over current or an over temperature condition.

대표청구항 ▼

An integrated circuit power timer comprising: a power field effect transistor switching means for controllably switching power to a load; a current sensing field effect transistor means used for sensing current flowing through the load; an amplifier for amplifying the sensed current; a first compara

An integrated circuit power timer comprising: a power field effect transistor switching means for controllably switching power to a load; a current sensing field effect transistor means used for sensing current flowing through the load; an amplifier for amplifying the sensed current; a first comparator for comparing the amplified sensed current to a reference voltage and providing an output when the amplified sensed current exceeds the reference voltage; a bandgap voltage reference generator for providing the reference voltage; a thermal limit circuit for sensing the temperature of the integrated circuit and providing an output when the temperature exceeds a predetermined value; first logic means coupled to the first comparator and to the thermal limit circuit for providing an inhibiting output when the thermal limit circuit or the first comparator provides an output; a timing circuit for providing a timing signal output; a second comparator for comparing the timing signal output against a predetermined voltage reference and providing an output when the timing signal output is at a predetermined level with respect to the predetermined reference; second logic means for receiving the inhibiting output and the output of the second comparator and providing an output in response to the output of the second comparator in the absence of the inhibiting output; and buffer driver means for providing a driving signal to the power field effect transistor switching means and to the current sensing field effect transistor means in response to the output of the second logic means.