초록 ▼

A solid state dc switch for switching power from the positive terminal of a ground referenced dc voltage source to the terminal of a ground referenced load. The solid state switch has a divide-by-two circuit means responsive to a clock signal and to a control signal first state for providing first a

A solid state dc switch for switching power from the positive terminal of a ground referenced dc voltage source to the terminal of a ground referenced load. The solid state switch has a divide-by-two circuit means responsive to a clock signal and to a control signal first state for providing first and second symmetrical output signals at a frequency of one-half the frequency of said clock frequency. It also has a transformer drive and rectifier means for providing an isolated dc signal. An isolated switching means is included which is responsive to the high state of an isolated dc signal, having a transistor switch having a collector, an emitter and a base, the collector being coupled to a positive terminal of a ground referenced voltage source. The emitter is coupled to the return of the ground referenced load. The base is coupled to an isolated dc signal. The switching means is responsive to the change of state of the isolated dc signal from a low to a high state for limiting the rate of rise of voltage on a load to a predetermined limit subsequent to a change of state. The switching means is also responsive to the change of state of an isolated dc signal from a high state to a low state for limiting the rate of fall of voltage on a load subsequent to a change of state of an isolated dc signal from a high state to a low state.

대표청구항 ▼

A solid state dc switch for switching power from a positive terminal of a ground referenced dc voltage source to a terminal of a ground referenced loaded, said solid state dc switch being responsive to a control signal having a first and second state from a control signal source and also responsive

A solid state dc switch for switching power from a positive terminal of a ground referenced dc voltage source to a terminal of a ground referenced loaded, said solid state dc switch being responsive to a control signal having a first and second state from a control signal source and also responsive to a clock signal from a clock signal source, said clock signal having a first and second state, said solid state dc switch comprising: divide-by-two circuit means coupled to said control signal source and to said clock signal source, said divide-by-two circuit means being being responsive to said clock signal and to said control signal first state for providing a first and second symmetrical output signals at a frequency of one-half the frequency of said lock frequency, said second symmetrical output signal being delayed in time by one-half period from said first output signal; said divide-by-two circuit means being reponsive to said control signal second state for interrupting said first and second symmetrical output signals; transformer drive and rectifier means coupled to receive said first and second symmetrical output signals from said divide-by-two circuit means, said transformer drive and rectifier means being responsive to said first and second symmetrical output signals for providing an isolated dc signal having a high state in response to said first and second symmetrical output signals and for providing an isolated dc signal low state in response to interruption of said first and second symmetrical signals output; an isolated switching means coupled to receive said isolated dc signal from said transformer drive and rectifier means said isolated switching means being responsive to said high state of said isolated dc signal for coupling said positive terminal of said ground referenced dc voltage source to the terminal of said ground referenced load, and for decoupling said positive terminal of said ground reference dc voltage source from the terminal of said ground referenced load in response to the low state of the isolated dc signal.