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Solder delivery systems 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/58
  • B23K-001/12
출원번호 US-0840624 (1986-03-17)
발명자 / 주소
  • Noel Raymond (Menlo Park CA) Robinson William M. (Palo Alto CA) Cherian Gabe (Fremont CA) Clifford Thomas H. (Half Moon Bay CA) Carlomagno William D. (Redwood City CA) Deasy William M. (Redwood City
출원인 / 주소
  • Raychem Corp. (Menlo Park CA 02)
인용정보 피인용 횟수 : 45  인용 특허 : 20

초록

Mechanical means and methods for delivery of solder preforms arranged in generally rectilinear patterns and oriented so that the ends of the solder preforms may join two planar surfaces upon the application of heat are disclosed. Several embodiments facilitate the delivery of solder preforms in the

대표청구항

A solder post delivery system comprising: a positioning means for positioning solder posts, said positioning means being elongated along a longitudinal axis, said positioning means having a plurality of longitudinally spaced openings therethrough, each of said openings having a top and a bottom gene

이 특허에 인용된 특허 (20)

  1. Abraham Bruce C. (Limekiln PA) Fegley Charles R. (Laureldale PA), Adapting contacts for connection thereto.
  2. Fisher ; Jr. John R. (Plainsboro NJ), Cast solder leads for leadless semiconductor circuits.
  3. Grovender Steven L. (Saint Paul MN), Connector.
  4. Scheingold William S. (Palmyra PA) Youngfleish Frank C. (Harrisburg PA), Connector for a leadless electronic package.
  5. Grabbe ; Dimitry G., Connector for connecting a circuit element to the surface of a substrate.
  6. Nemoto Hideo (Sakura JA) Koike Yuuji (Matsudo JA), Connector having electro-conductive rubber terminal.
  7. Anhalt John W. (Orange CA) Goodman David S. (Mission Viejo CA) Alonso Ocsar (Westminister CA), Electrical connector.
  8. Benasutti John E. (Lansdale PA), Electrical connector assembly for an integrated circuit package.
  9. Madden James J. (Naperville IL), Integrated circuit chip carrier mounting arrangement.
  10. Sado Ryoichi (Saitama JPX), Interconnectors.
  11. Grabbe Dimitry (Lisbon Falls ME) Patterson Ronald (Dauphin PA), Lead frame and chip carrier housing.
  12. Hopkins John R. (Cambridge MD), Method and apparatus for producing a premolded packaging.
  13. Tracy ; John M., Method of fabricating an array of flexible metallic interconnects for coupling microelectronics components.
  14. Squitieri Vincent (Billerica MA) Lynn William Joseph (Groveland MA), Method of forming an interconnector.
  15. Moore John R. (Santa Ana CA), Method of making conductive elastomer connectors.
  16. Buchoff Leonard S. (Bloomfield NJ) Kosiarski Joseph P. (Englishtown NJ) Dalamangas Chris A. (Union NJ), Method of making electrically conductive connector.
  17. Reid Gilbert R. (Norristown PA), Multiple solder pre-form with non-fusible web.
  18. Curtis, III, Hazen, Solder beams leads.
  19. Grassauer Willie K. (Menlo Park CA) Robinson William M. (Palo Alto CA), Solder delivery system.
  20. Dyce John W. (Sidney NY) Buczak Ronald F. (Poughkeepsie NY), Solder pack and method of manufacture thereof.

이 특허를 인용한 특허 (45)

  1. Boon, Suan Jeung, Adhesive layer for an electronic apparatus having multiple semiconductor devices.
  2. Werther William E., Assembly including fine-pitch solder bumping and method of forming.
  3. Hwang, Chi-won, Carbon nanotube-reinforced solder caps, and chip packages and systems containing same.
  4. Svendsen ; Leo G. (Redwood City CA) Leary Rebecca A. (Milpitas CA) Geschwind Gary I. (Palo Alto CA), Connection to a component for use in an electronics assembly.
  5. Kent Geroge M. (Sierra Madre CA), Desoldering aid.
  6. Hart, Martin B.; Young, Roger C., Disposable apparatus for aligning and dispensing solder columns in an array.
  7. Hart, Martin B., Fixture for delivering interconnect members onto a substrate.
  8. Nakamura Keiichi (Tokyo JPX) Oshima Tsutomu (Tokyo JPX) Kurokawa Noriharu (Surashi JPX) Kitai Toshihiko (Isehara JPX), I/O pin and method for making same.
  9. Syslak, Morten; Folkedal, Leiv Adne; Baldantoni, Antonio, Manifold for heat exchanger and process therefor.
  10. Yoshino, Toyokazu; Okamoto, Katsuya; Ogata, Shigeki; Morimoto, Shinji; Nakashima, Kouji, Manufacturing method of flexible printed wiring board.
  11. Hertz Eric, Method and apparatus for placing conductive preforms.
  12. Freeman, Gary; Nowak, Jr., Thomas; Purcell, Thomas; Mirabito, A. Jason; Sullivan, Thomas M.; Foulke, Richard F.; Foulke, Jr., Richard F.; Ohlenbusch, Cord W., Method and apparatus for placing solder balls on a substrate.
  13. Teo, Keng Lee; Chin, Wey Ngee Desmond, Method and apparatus for soldering modules to substrates.
  14. Hertz Eric L., Method and apparatus using colored foils for placing conductive preforms.
  15. Hwang, Chi won, Method of assembling carbon nanotube reinforced solder caps.
  16. Peloza, Kirk B.; Faje, Richard A.; Hodge, Ronald C.; Gould, Jon S., Method of attaching a solder element to contact and the contact assembly formed thereby.
  17. Nishikawa Toru,JPX ; Satoh Ryohei,JPX ; Harada Masahide,JPX ; Hayashida Tetsuya,JPX ; Shirai Mitugu,JPX, Method of fabricating electronic circuit device and apparatus for performing the same method.
  18. Le Coz Christian Robert ; Mead Donald Ivan ; Stockholm Roger James, Method of making an electronic package having spacer elements.
  19. Seidler,Jack; Zhitomirsky,Aleksandr, Method of retaining a solder mass on an article.
  20. Hayasaka, Nobuo; Okumura, Katsuya; Sasaki, Keiichi; Matsuo, Mie, Multichip semiconductor device, chip therefor and method of formation thereof.
  21. Hayasaka, Nobuo; Okumura, Katsuya; Sasaki, Keiichi; Matsuo, Mie, Multichip semiconductor device, chip therefor and method of formation thereof.
  22. Hayasaka, Nobuo; Okumura, Katsuya; Sasaki, Keiichi; Matsuo, Mie, Multichip semiconductor device, chip therefor and method of formation thereof.
  23. Hayasaka,Nobuo; Okumura,Katsuya; Sasaki,Keiichi; Matsuo,Mie, Multichip semiconductor device, chip therefor and method of formation thereof.
  24. Honda,Hirokazu, Multilayer interconnection board, semiconductor device having the same, and method of forming the same as well as method of mounting the semiconductor chip on the interconnection board.
  25. Honda, Hirokazu, Multilayer interconnection board, semiconductor device having the same, and method of forming the same as well as method of mounting the semicondutor chip on the interconnection board.
  26. Dautartas Mindaugas Fernand, Passive alignment of components with micromachined tool.
  27. Ball, Michael, Recessed tape and method for forming a BGA assembly.
  28. Michael Ball, Recessed tape and method for forming a BGA assembly.
  29. Hart, Martin B.; Young, Roger C.; Butcher, Jeffrey Ryan, Refillable apparatus for aligning and depositing solder columns in a column grid array.
  30. Gruber Peter Alfred, Solder anchor decal.
  31. Gruber Peter Alfred (Mohegan Lake NY), Solder anchor decal and method.
  32. Foulke Richard F. ; Foulke ; Jr. Richard F. ; Ohlenbusch Cord W., Solder ball placement apparatus.
  33. Foulke Richard F. ; Foulke ; Jr. Richard F. ; Ohlenbusch Cord W., Solder ball placement method.
  34. Clark Thomas C. (301 N. 17th St. Camp Hill PA 17011), Solder containing electrical connector and method for making same.
  35. Tang Ching C. (2066 Verbena Ct. Fremont CA 94539), Solder delivery and array apparatus.
  36. McGaffigan Thomas H. (Half Moon Bay CA), Solder delivery system.
  37. Abe, Masahiko; Watanabe, Koji; Takahashi, Hideaki; Kanno, Masahiko; Ito, Masaya, Solder piece, chip solder and method of fabricating solder piece.
  38. Zanolli, James; Cachina, Joseph, Solder-bearing articles and method of retaining a solder mass along a side edge thereof.
  39. McMahon John Francis (Phoenix AZ) Chiu George (Palo Alto CA), Tape withh solder forms and methods for transferring solder forms to chip assemblies.
  40. Boon, Suan Jeung, Wafer level pre-packaged flip chip.
  41. Boon, Suan Jeung, Wafer level pre-packaged flip chip system.
  42. Boon, Suan Jeung, Wafer level pre-packaged flip chip systems.
  43. Seo, Won Cheol; Cho, Dae Sung, Wafer-level light emitting diode and wafer-level light emitting diode package.
  44. Seo, Won Cheol; Cho, Dae Sung, Wafer-level light emitting diode package and method of fabricating the same.
  45. Seo, Won Cheol; Cho, Dae Sung, Wafer-level light emitting diode package and method of fabricating the same.
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