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Cache memory consistency control with explicit software instructions 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-012/08
출원번호 US-0750381 (1985-06-28)
발명자 / 주소
  • Worley
  • Jr. William S. (Saratoga CA) Bryg William R. (Saratoga CA) Baum Allen (Palo Alto CA)
출원인 / 주소
  • Hewlett-Packard Company (Palo Alto CA 02)
인용정보 피인용 횟수 : 99  인용 특허 : 1

초록

Memory integrity is maintained in a system with a hierarchical memory using a set of explicit cache control instructions. The caches in the system have two status flags, a valid bit and a dirty bit, with each block of information stored. The operating system executes selected cache control instructi

대표청구항

A computer system having a multi-level memory hierarchy and means for maintaining the integrity of blocks of information stored at different levels in the hierarchy, comprising: a processor for executing instructions and processing data, said processor executing a set of instructions for providing e

이 특허에 인용된 특허 (1)

  1. Ryan Charles P. (Phoenix AZ), Buffer store including control apparatus which facilitates the concurrent processing of a plurality of commands.

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