[특허]Complex arithmetic vector processor for performing control function, scalar operation, and set-up of vector signal proce

Complex arithmetic vector processor for performing control function, scalar operation, and set-up of vector signal proce 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06F-015/347 G06F-015/31 G06F-015/332
출원번호	US-0872737 (1986-06-10)
발명자 / 주소	Webb Richard F. (Baltimore MD)
출원인 / 주소	The United States of America as represented by the Secretary of the Air Force (Washington DC 06)
인용정보	피인용 횟수 : 120 인용 특허 : 0

초록 ▼

The processor is optimized for high-speed processing of large vectors, to fully utilize VHSIC technology, and to implement a signal processor having the highest possible throughput per volume while maintaining flexibility. It includes a 25 MHz embedded 1750A computer for performing control function scalar operations and set-up of vector signal processing instructions to be performed by a vector processing unit. The 40 MHz vector processing unit (VPU) performs high speed processing of real and complex vectors. The VPU\s control portion provides an interface and status to the embedded 1750A computer. It also provides the control necessary for vector processing to occur concurrently with 1750A execution and concurrent with I/O of vector data.

대표청구항 ▼

A complex arithmetic vector processor module which is optimized for high speed processing of large vectors, using very high speed integrated circuit (VHSIC) chips, to implement a signal processor having the highest possible throughput per volume while maintaining flexibility, for use in a system having a computer bus and a data bus, said module comprising: a computer unit operating at a first clock rate and a vector processing unit operating at a second clock rate, the second clock rate being at a substantially higher frequency than the first clock rate, the vector processing unit being comprised of a vector processing control portion and a vector processing element portion; wherein the computer unit comprises interconnected integrated circuit chip components including a controller, an arithmetic unit, a micro-memory, a program memory, a memory control circuit, and first switching means for selectively interconnecting said components of the computer unit and also for making selective connections to the vector processing unit; wherein the vector processing unit comprises interconnected integrated circuit chip components including second switching means for selectively interconnecting said components; the vector processing element portion components being a data memory coupled to memory control circuits and a pipelined arithmetic unit; the vector processor control portion components being a vector micro memory, vector control circuits, vector timing circuits, and a memory address generator; said module being integrated in said system via computer bus interface means for coupling said computer bus to the computer unit and to the vector processing unit, and data bus interface means for coupling said data bus via said second switch means to said vector processing element portion; the computer unit being programmed for performing control function scalar operations and set-up of vector signal processing instructions to be performed by the vector processing unit; the vector processing unit being programmed for performing high speed processing of real and complex vectors, wherein the vector processing control portion provides an interface and status to the computer unit, and also provides control necessary for vector processing to occur concurrently with execution in said computer unit and concurrent with input/output of vector data; wherein said pipelined arithmetic unit comprises two pipelined arithmetic integrated circuit chips, each of which is a general purpose, programmable unit, for operation at said second clock rate, for use in advanced signal processors to perform high speed vector-efficient operations, supporting real and complex operations in addition to logical functions, and for use in pairs to perform high speed complex processing applications, and which can also be organized in a variety of pipelined configurations geared for specific signal processing applications; wherein each of said pipelined arithmetic integrated circuit chips comprises two pipelined multipliers and four arithmetic logic units connected with each other and with input/output buses through multiplexers and registers via crossbar means in said second switch means, with micro-programming means for controlling the crossbar means to make the unit highly reconfigurable, means for equalizing delays insequential pipeline sections, including pipelining the multipliers and placing registers both ahead and after each arithmetic logic unit, which optimizes the speed in vector computations without the need for resorting to multiple clocks; means for bypassing the multipliers if they are not needed and to bypass one arithmetic logic unit if only one is needed, means for loading microcode for the next instruction concurrent with execution of the present instruction.

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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
구성항목	기본정보 상세정보 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표IPC 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 공고번호, 공고일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표출원인, 출원인국적, 출원인주소, 발명자, 발명자E, 발명자코드, 발명자주소, 발명자 우편번호, 발명자국적, 대표IPC, IPC코드, 요약, 미국특허분류, 대리인주소, 대리인코드, 대리인(한글), 대리인(영문), 국제공개일자, 국제공개번호, 국제출원일자, 국제출원번호, 우선권, 우선권주장일, 우선권국가, 우선권출원번호, 원출원일자, 원출원번호, 지정국, Citing Patents, Cited Patents
저장형식	Text(ASCII format) Excel format PIAS분석(.xls)
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연합인증

Complex arithmetic vector processor for performing control function, scalar operation, and set-up of vector signal proce 원문보기

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연합인증

Complex arithmetic vector processor for performing control function, scalar operation, and set-up of vector signal proce 원문보기

초록 ▼

대표청구항 ▼

연구과제 타임라인

전체(0) 논문(0) 특허(0) 보고서(0)

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이 특허를 인용한 특허 (120)

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특허 원문 보기

IPC 상위 출원인

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

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