초록 ▼

A receiver having an interface arrangement for connection between a television circuit and a conditional access sub-system conveys data via a bus having a four frame bus cycle period with a bit rate corresponding to the line rate. During a first part of the bus cycle period data is conveyed from the

A receiver having an interface arrangement for connection between a television circuit and a conditional access sub-system conveys data via a bus having a four frame bus cycle period with a bit rate corresponding to the line rate. During a first part of the bus cycle period data is conveyed from the receiver to the sub-system sequentially as follows: i. an address block of 1 byte with the unique address of the sub-system with which the receiver is in communication, ii. a status block of 1 byte providing status information for the following blocks in the first part, iii,iv,v. three data blocks each of 93 bytes and each containing an entitlement message, vi. a keying block of 1 byte conveying keyboard or remote control commands, and vii,viii. a further block of either ½byte (vii) or 2½bytes (vii+viii) conveying frame count information. During the second and remaining part of the bus cycle period which comprises 30 or 28 bytes, depending on the length of the further block, data is transmitted from the sub-system to the receiver.

대표청구항 ▼

A receiver having an interface arrangement for connection between said receiver and a conditional access sub-system and comprising a bus having a first line for conveying clock signals at television line frequency rate from said receiver to said sub-system, a second line for conveying data with a bi

A receiver having an interface arrangement for connection between said receiver and a conditional access sub-system and comprising a bus having a first line for conveying clock signals at television line frequency rate from said receiver to said sub-system, a second line for conveying data with a bit rate corresponding to that of the clock signal and with 8 bits per byte from said receiver to said sub-system during a first part of a bus cycle period and from said sub-system to said receiver during the remaining part of said bus cycle period, and a third line for conveying a direction signal indicating to said sub-system the direction of data travel on said second line, the bus cycle period having a duration equal to four television frame periods, the data on said second line during the first part of each bus cycle period including sequentially: i. an address block of 1 byte containing the unique address of the sub-system with which said receiver is in communication, ii. a status block of 1 byte providing status information for the following and remaining individual blocks in the first part of the bus cycle period, iii. three data blocks each of 93 bytes and each containing an entitlement message, iv. a keying block of 1 byte conveying keyboard or remote control commands, and v. a further block of either ½byte or 2½bytes conveying either the least significant bits of the frame count (4 bits) or the 256-frame count (20 bits), while the data on said second line during the second part of each bus cycle period comprises a data block of either 30 or 28 bytes, depending on the length of said further block, comprising information for said receiver from said sub-system.