[특허]Connecting structure for connecting a memory unit to a memory unit controller

[미국특허] Connecting structure for connecting a memory unit to a memory unit controller 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G11C-007/00 H01R-023/18
출원번호	US-0085187 (1987-08-14)
우선권정보	JP-0192558 (1986-08-18)
발명자 / 주소	Matsushita Tsuyoshi (Shizuoka JPX)
출원인 / 주소	Tokyo Electric Company, Ltd. (Tokyo JPX 03)
인용정보	피인용 횟수 : 93 인용 특허 : 2

초록 ▼

Grounding terminals of a memory unit are disposed at the opposite ends of an array of signal terminals of the memory unit, respectively, reception grounding terminals of a connector are disposed at the opposite ends of any array of reception signal terminals of the connector, respectively, the grounding terminals of the memory unit are connected to the reception grounding terminals of the connector, respectively, before the signal terminals of the memory unit are connected to the reception signal terminals of the connector in inserting the memory unit in the connector. Upon the insertion of the memory unit in the connector, the static electricity accumulate in the memory unit is discharged surely to a ground without affecting the semiconductor memory of the memory unit through the signal terminals and the reception signal terminals.

대표청구항 ▼

A connecting structure for electrically connecting a memory unit to an external control circuit, said connecting structure comprising: a connector means having a plurality of in-line reception information signal terminals arranged in a straight line and connected to a control circuit, reception grounding terminals disposed at the opposite sides of said plurality of in-line reception information signal terminals, respectively, and connected to a ground; and a memory terminal arrangement provided in a memory unit having an optionally reloadable semiconductor memory and adapted to be inserted in said connector, said memory terminal arrangement comprising: a plurality of in-line output information signal terminals to be respectively connected to said reception information signal terminals, said in-line output signal terminals arranged along one side of said memory unit; and, output grounding terminals disposed at the opposite ends of said plurality of said output information terminals, respectively, so as to be connected to said reception grounding terminals prior to said output information signal terminals being connected to said reception information signal terminals when said memory unit is inserted in said connector means.

이 특허에 인용된 특허 (2) 인용/피인용 타임라인 분석

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[미국특허] Connecting structure for connecting a memory unit to a memory unit controller 원문보기

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[미국특허] Connecting structure for connecting a memory unit to a memory unit controller 원문보기

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이 특허에 인용된 특허 (2) 인용/피인용 타임라인 분석

이 특허를 인용한 특허 (93) 인용/피인용 타임라인 분석

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