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Contact plug and interconnect employing a barrier lining and a backfilled conductor material 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/54
출원번호 US-0016429 (1987-02-19)
발명자 / 주소
  • Dixit Pankaj (Sunnyvale CA) Sliwa Jack (Los Altos Hills CA) Klein Richard K. (Mountain View CA) Sander Craig S. (Mountain View CA) Farnaam Mohammad (Santa Clara CA)
출원인 / 주소
  • Advanced Micro Devices, Inc. (Sunnyvale CA 02)
인용정보 피인용 횟수 : 169  인용 특허 : 3

초록

A stable, low resistance contact is formed in a contact hole (16) through an insulating layer (14), e.g., silicon dioxide, formed on a surface of a semiconductor substrate (12), e.g., silicon, to a portion of a doped region (10) in said semiconductor surface. The contact comprises (a) an adhesion an

대표청구항

A low resistance contact plug, stable in the presence of aluminum, formed in a contact hole less than about m2 in area through at least one insulating layer formed on a semiconductor surface to at least a portion of a doped region in said semiconductor surface, said contact comprising: (a) an adhesi

이 특허에 인용된 특허 (3)

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  3. Hartmann Jol (Claix FRX), Process for the autopositioning of an interconnection line on an electric contact hole of an integrated circuit.

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