초록 ▼

A silicon-on-insulator MOS transistor is disclosed which has contact regions on both the source and drain sides of the gate electrode for potentially making contact to the body node from either side. Each contact region is of the same conductivity type as the body node, (for example, a p-type region

A silicon-on-insulator MOS transistor is disclosed which has contact regions on both the source and drain sides of the gate electrode for potentially making contact to the body node from either side. Each contact region is of the same conductivity type as the body node, (for example, a p-type region for an n-channel transistor), and may be formed by blocking all source/drain implants from the contact regions, so that the contact region remains substantially with the same doping concentration as that of the body region. A mask is provided prior to silicidation so that the contact regions on either side of the gate electrode are not connected by silicide to the adjacent source/drain doped regions. Once a side is selected to be the source of the transistor, ohmic connection is then made between the abutting source region and the contact region by way of contacts through an overlying interlevel dielectric and metallization. A second embodiment of the transistor is disclosed which provides such contact with reduction in the channel width, by allowing the lightly-doped drain extension of the source and drain to be present between the contact region and the gate electrode at the surface of the structure. A configuration of multiple transistors on a common mesa is also disclosed, where each one of the transistors has a contact region on both sides of its gate so that all of the contact regions on the mesa are connected through the body nodes of the transistors. A single body-to-source node connection can thus provide body node bias for all of the transistors on the mesa.

대표청구항 ▼

A method of fabricating a transistor in a semiconductor layer overlying an insulating film, comprising: defining an active portion of said semiconductor layer of a first conductivity type; forming a gate electrode over said active portion; applying a first mask layer over said active portion to prot

A method of fabricating a transistor in a semiconductor layer overlying an insulating film, comprising: defining an active portion of said semiconductor layer of a first conductivity type; forming a gate electrode over said active portion; applying a first mask layer over said active portion to protect a first contact region on a first side of said gate electrode and a second contact region on a second side of said gate electrode; doping regions of said active portion not protected by said first mask layer with dopant of a second conductivity type; applying a second mask layer over said active portion to protect said first and second contact regions, and to protect portions of said doped regions adjacent to said first and second contact regions; forming a silicide film over said doped regions not protected by said second mask layer; forming an interlevel dielectric layer overall; etching a contact via through said interlevel dielectric to contact said first contact region; and forming a metal line in contact with said first contact region through said contact via.