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Method of making high breakdown voltage semiconductor device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/26
출원번호 US-0358057 (1989-05-30)
발명자 / 주소
  • Arthur Stephen D. (Scotia NY) Temple Victor A. K. (Jonesville NY)
출원인 / 주소
  • General Electric Company (Schenectady NY 02)
인용정보 피인용 횟수 : 90  인용 특허 : 3

초록

A semiconductor device having at least one P-N junction and a multiple-zone junction termination extension (JTE) region which uniformly merges with the reverse blocking junction is disclosed. The blocking junction is graded into multiple zones of lower concentration dopant adjacent termination to fa

대표청구항

A process of fabricating a semiconductor device including, when complete, at least one P-N junction, a first region of semiconductor material of one conductivity type having an upper surface and forming one side of said junction, a second region of semiconductor material having a lower surface and f

이 특허에 인용된 특허 (3)

  1. Temple Victor A. K. (Clifton Park NY), High breakdown voltage semiconductor device.
  2. Temple Victor A. K. (Saratoga NY) Tantraporn Wirojana (Schenectady NY), Method of making high breakdown voltage semiconductor device.
  3. Whight Kenneth R. (Cowfold GB2), Semiconductor diode.

이 특허를 인용한 특허 (90)

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