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Electronic device plated with gold by means of an electroless gold plating solution 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/08
  • H01L-023/52
출원번호 US-0184061 (1988-04-20)
우선권정보 JP-0226738 (1985-10-14); JP-0088269 (1986-04-18)
발명자 / 주소
  • Ushio Jiro (Yokohama JPX) Miyazawa Osamu (Yokosuka JPX) Tomizawa Akira (Yokohama JPX) Yokono Hitoshi (Ibaraki JPX) Kanda Naoya (Yokohama JPX) Matsuura Naoko (Yokohama JPX) Ando Setsuo (Kawasaki JPX)
출원인 / 주소
  • Hitachi, Ltd. (Tokyo JPX 03)
인용정보 피인용 횟수 : 36  인용 특허 : 10

초록

The present invention relates to an electroless gold plating solution, a method of plating by using the same, and an electronic device plated with gold by using the same. According to the present electroless gold plating solution, the plating solution components contain no cyanide ions, the amount o

대표청구항

An electronic device for mounting and interconnecting a plurality of integrated circuit semiconductor devices, comprising: a ceramic substrate having top and bottom surfaces, provided with a plurality of pads for connecting to said integrated circuit semiconductor devices, and with engineering chang

이 특허에 인용된 특허 (10)

  1. Obinata Hiroaki (Nagano JPX) Imai Kunihiko (Nagano JPX) Sunohara Masayuki (Nagano JPX), Ceramic package for semiconductor devices.
  2. Hosoi Yoshihiro (Kokubu JPX) Fujioka Takaaki (Kokubu JPX), Covering metal structure for metallized metal layer in electronic part.
  3. Gogal John F. (Lebanon NJ), Double cavity semiconductor chip carrier.
  4. Clementi Robert J. (Binghamton NY) Gazdik Charles E. (Endicott NY) Lafer William (Chenango Bridge NY) Lovesky Roy L. (Vestal NY) McBride Donald G. (Binghamton NY) Munson Joel V. (Port Crane NY) Skarv, Flexible film semiconductor chip carrier.
  5. Gilbert, Barry K.; Schwab, Daniel J., Leadless chip carrier apparatus providing for a transmission line environment and improved heat dissipation.
  6. Chant Peter R. (Burlington CAX), Method for producing circuit boards with deposited metal patterns and circuit boards produced thereby.
  7. Chant Peter R. (Burlington CAX), Method for producing circuit boards with deposited metal patterns and circuit boards produced thereby.
  8. Sugimoto Masahiro (Yokosuka JPX) Wakabayashi Tetsushi (Yokohama JPX) Muratake Kiyoshi (Kawasaki JPX), Semiconductor device.
  9. Dohya Akihiro (Tokyo JPX), Substrate having a pattern of an alloy of gold and a noble and a base metal with the pattern isolated by oxides of the n.
  10. Kadota Toshiki (Kodaira JPX) Ono Toshiro (Tokorozawa JPX) Suzuki Katsumi (Tokyo JPX) Iida Yasuo (Tokyo JPX), X-ray lithography mask and method for manufacturing the same.

이 특허를 인용한 특허 (36)

  1. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atsushi, Circuit-connecting material and circuit terminal connected structure and connecting method.
  2. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atsushi, Circuit-connecting material and circuit terminal connected structure and connecting method.
  3. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atsushi, Circuit-connecting material and circuit terminal connected structure and connecting method.
  4. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atsushi, Circuit-connecting material and circuit terminal connected structure and connecting method.
  5. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atsushi, Circuit-connecting material and circuit terminal connected structure and connecting method.
  6. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atsushi, Circuit-connecting material and circuit terminal connected structure and connecting method.
  7. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atushi, Circuit-connecting material and circuit terminal connected structure and connecting method.
  8. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atushi, Circuit-connecting material and circuit terminal connected structure and connecting method.
  9. Murakami Tooru,JPX ; Morimoto Keizin,JPX ; Yanada Isamu,JPX ; Tsujimoto Masanobu,JPX, Electroless gold plating bath.
  10. Uchida Hiroki,JPX ; Kiso Masayuki,JPX ; Nakamura Takayuki,JPX ; Kamitamari Tohru,JPX ; Susuki Rumiko,JPX ; Shimizu Koichiro,JPX, Electroless nickel plating solution and method.
  11. Watanabe, Itsuo; Fujinawa, Tohru; Arifuku, Motohiro; Kanazawa, Houko; Kuwano, Atushi, Electronic circuit including circuit-connecting material.
  12. Sambucetti Carlos Juan ; Rubino Judith Marie ; Edelstein Daniel Charles ; Cabral ; Jr. Cyryl ; Walker George Frederick ; Gaudiello John G ; Wildman Horatio Seymour, Method for forming Co-W-P-Au films.
  13. Sambucetti, Carlos Juan; Rubino, Judith Marie; Edelstein, Daniel Charles; Cabral, Jr., Cyryl; Walker, George Frederick; Gaudiello, John G; Wildman, Horatio Seymour, Method for forming Co-W-P-Au films.
  14. Ichimura, Masaya; Masui, Kanji, Method for forming gold plating.
  15. Asai, Motoo; Hiramatsu, Yasuji, Method for manufacturing printed wiring board.
  16. Ito Susumu,JPX ; Ishikawa Hiroyuki,JPX, Method for producing an ink jet head.
  17. Abe,Miwa; Imafuji,Kei, Non-cyanogen type electrolytic solution for plating gold.
  18. Brunschwiler, Thomas; Doering, Andreas; Luijten, Ronald P.; Oggioni, Stefano S.; Sagmeister, Joerg-Eric; Sagmeister, Patricia; Schmatz, Martin, Printed circuit board with edge soldering for high-density packages and assemblies.
  19. Wakihara,Yoshinori; Yamada,Kazuhito, Printed circuit boards and method of producing the same.
  20. Asai, Motoo; Hiramatsu, Yasuji; Wakihara, Yoshinori; Yamada, Kazuhito, Printed wiring board and method for manufacturing the same.
  21. Asai, Motoo; Hiramatsu, Yasuji; Wakihara, Yoshinori; Yamada, Kazuhito, Printed wiring board and method for manufacturing the same.
  22. Asai,Motoo, Printed wiring board and method for manufacturing the same.
  23. Asai,Motoo; Hiramatsu,Yasuji, Printed wiring board and method for manufacturing the same.
  24. Asai,Motoo; Hiramatsu,Yasuji, Printed wiring board and method for manufacturing the same.
  25. Wakihara, Yoshinori; Yamada, Kazuhito, Printed wiring board and method for manufacturing the same.
  26. Wakihara,Yoshinori; Yamada,Kazuhito, Printed wiring board and method for manufacturing the same.
  27. Hung, Sung-Ching; Huang, Wen-Pin, Semiconductor package.
  28. Iwane, Tomohiko; Toyosawa, Kenji, Tape carrier type semiconductor device with gold/gold bonding of leads to bumps.
  29. Chandross Edwin Arthur ; Crone Brian Keith ; Dodabalapur Ananth ; Filas Robert William, Thin film transistors.
  30. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  31. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  32. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  33. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  34. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  35. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  36. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
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