$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Critical path analyzer with path context window 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-015/20
출원번호 US-0206184 (1988-06-10)
발명자 / 주소
  • Kaiser Richard R. (10810 NW. La Cassel Crest La. Portland OR 97229) Bartel Robert W. (Rte. 2
  • P.O. Box 107 Gaston OR 97119)
인용정보 피인용 횟수 : 79  인용 특허 : 3

초록 ▼

A screen display includes a path context window for displaying a signal path in its entirety apart from the schematic sheets on which the path portions appear. The window contains multiple display portions each graphically displaying a path portion appearing on a separate schematic sheet. The multip

대표청구항 ▼

A screen display for displaying a signal path through a circuit, the signal path having multiple portions that appear on separate schematic sheets of the circuit, comprising: a first display portion for graphically displaying a path portion apart from a schematic sheet of the circuit; and at least a

이 특허에 인용된 특허 (3)

  1. Suzuki Kazuhiro (Ebina JPX), Drawing output unit.
    상세보기
  2. Linsker Ralph (Scarsdale NY), Iterative method for establishing connections and resulting product.
    상세보기
  3. Duisberg Robert A. (Seattle WA), System for animating program operation and displaying time-based relationships.
    상세보기

이 특허를 인용한 특허 (79)

  1. Nishida,Katsunori, Apparatus and method for analyzing post-layout timing critical paths.
    상세보기
  2. Nishida, Katsunori, Apparatus for analyzing post-layout timing critical paths.
    상세보기
  3. Wakita Makoto (Kasugai JPX), Apparatus for computing delay time of integrated circuit.
    상세보기
  4. Gregory Brent ; Chatterjee Trinanjan ; Lin Jing C. ; Raghvendra Srinivas ; Girczyc Emil ; Estrada Paul ; Seawright Andrew, Architecture and methods for a hardware description language source level analysis and debugging system.
    상세보기
  5. Gregory Brent ; Chatterjee Trinanjan ; Lin Jing C. ; Raghvendra Srinivas ; Girczyc Emil ; Estrada Paul ; Seawright Andrew, Architecture and methods for a hardware description language source level debugging system.
    상세보기
  6. Binder, William A.; Leavens, Ross B.; Murphy, Jr., Sherwin C., Arrangements for developing integrated circuit designs.
    상세보기
  7. Kundu Sandip (Austin TX) Kuehlmann Andreas (Poughkeepsie NY) Srinivasan Arvind (Sunnyvale CA), CMOS transistor network to gate level model extractor for simulation, verification and test generation.
    상세보기
  8. Yasuda Mitsuru,JPX ; Sugiyama Hiroyuki,JPX ; Ito Noriyuki,JPX ; Yamashita Ryoichi,JPX ; Konno Tadashi,JPX ; Abe Yasunori,JPX ; Bizen Naomi,JPX ; Maruyama Terunobu,JPX ; Kato Yoshiyuki,JPX ; Isomura T, Circuit designing apparatus of an interactive type.
    상세보기
  9. He, Zheng-Yu, Computer aided design system and method.
    상세보기
  10. Chang Norman H. (Fremont CA) Chang Keh-Jeng (Sunnyvale CA) Lee Keunmyung (Redwood City CA) Oh Soo-Young (Fremont CA), Computer-aided design methods and apparatus for multilevel interconnect technologies.
    상세보기
  11. Jones Edwin (Sunnyvale CA) Kong Soon (San Jose CA) Eirikkson Asgeir Th. (Los Gatos CA), Concurrently operating design tools in an electronic computer aided design system.
    상세보기
  12. Hasegawa Takumi,JPX, Delay analysis result display device.
    상세보기
  13. Blomquist, Michael; Bresina, Timothy; Bynum, Gail; Welsch, Michael, Display for pump.
    상세보기
  14. Curtis, Matthew C.; Loy, Jenifer M.; Gabbert, Adam K.; Ryckman, Jayson P.; Kornerup, Jacob; Correll, Jeffrey N.; Hayles, Timothy J., Displaying physical signal routing in a diagram of a system.
    상세보기
  15. Wheeler, William R.; Fennell, Timothy J.; Adiletta, Matthew J., Employing intelligent logical models to enable concise logic representations for clarity of design description and for rapid design capture.
    상세보기
  16. Biswas, Partha; Zhao, John, Extensible platform for back-annotation of target-specific characterization onto a model of a hardware system.
    상세보기
  17. Bennett David Wayne (Louisville CO) Dellinger Eric Ford (Boulder CO) Manaker ; Jr. Walter A. (Boulder CO) Stern Carl M. (Boulder CO) Troxel William R. (Longmont CO) Young Jay Thomas (Louisville CO), Frequency driven layout and method for field programmable gate arrays.
    상세보기
  18. Wheeler,William R.; Adiletta,Matthew J., Gate estimation process and method.
    상세보기
  19. Wheeler,William R.; Adiletta,Matthew J., Generating a logic design.
    상세보기
  20. Lawman Gary R., HDL design entry with annotated timing.
    상세보기
  21. Cummins,Charles; Melander,Greg S.; Hone,Michael James; Ligameri,Mark R., Image for a portion of a display screen.
    상세보기
  22. Stabb,Charles W.; Cummins,Charles; Melander,Greg S.; Ligameri,Mark R., Image for a portion of a display screen.
    상세보기
  23. Stabb,Charles W.; Cummins,Charles; Melander,Greg S.; Ligameri,Mark R.; Matthews,David A.; Lerner,Matthew R., Image for a portion of a display screen.
    상세보기
  24. Stabb,Charles W.; Cummins,Charles; Melander,Greg S.; Ligameri,Mark R.; Hone,Michael James, Image for a portion of display screen.
    상세보기
  25. Yasuda Mitsuru,JPX ; Sugiyama Hiroyuki,JPX ; Ito Noriyuki,JPX ; Yamashita Ryoichi,JPX ; Konno Tadashi,JPX ; Abe Yasunori,JPX ; Bizen Naomi,JPX ; Maruyama Terunobu,JPX ; Kato Yoshiyuki,JPX ; Isomura T, Interactive circuit designing apparatus which displays a result of component placement and wire routing from a layout design unit.
    상세보기
  26. Blomquist, Michael L., Interface for medical infusion pump.
    상세보기
  27. Blomquist, Michael L., Interface for medical infusion pump.
    상세보기
  28. Blomquist, Michael L., Interface for medical infusion pump.
    상세보기
  29. Blomquist, Michael L., Interface for medical infusion pump.
    상세보기
  30. Blomquist, Michael L., Interface for medical infusion pump.
    상세보기
  31. Blomquist, Michael L., Interface for medical infusion pump.
    상세보기
  32. Evans, William James; Greenberg, Diana Willow; Blomquist, Michael L., Interface for medical infusion pump.
    상세보기
  33. Yamashita Keiichirou (Yokohama JPX) Uchida Akihiro (Kawasaki JPX), Logic circuit diagram editor system.
    상세보기
  34. Wheeler,William R.; Fennell,Timothy J.; Adiletta,Matthew J., Logic simulation.
    상세보기
  35. Saitoh Minoru,JPX ; Satoh Akiko,JPX, Logic simulation system and method.
    상세보기
  36. Michael D. Rostoker ; Carlos Dangelo ; Daniel R. Watkins, METHOD AND SYSTEM FOR CREATING, DERIVING AND VALIDATING STRUCTURAL DESCRIPTION OF ELECTRONIC SYSTEM FROM HIGHER LEVEL, BEHAVIOR-ORIENTED DESCRIPTION, INCLUDING INTERACTIVE SCHEMATIC DESIGN AND SIMULA.
    상세보기
  37. Gregory Brent, Method and apparatus for displaying text including context sensitive information derived from parse tree.
    상세보기
  38. Kerzman,Joseph P.; Rezek,James E., Method and apparatus for efficiently viewing a number of selected components using a database editor tool.
    상세보기
  39. Garnett, Robert E.; Kerzman, Joseph P.; Rezek, James E.; Aubel, Mark D., Method and apparatus for selectively viewing nets within a database editor tool.
    상세보기
  40. Mason Martin T. ; Evans Scott C. ; Aranake Sandeep S., Method and system for configuring an array of logic devices.
    상세보기
  41. Dangelo Carlos ; Deeley Richard ; Nagasamy Vijay ; Vafai Manoucher, Method and system for creating and validating low level description of electronic design.
    상세보기
  42. Dangelo Carlos ; Watkins Daniel ; Mintz Doron, Method and system for creating and validating low level description of electronic design from higher level, behavior-or.
    상세보기
  43. Dangelo Carlos (Los Gatos CA) Watkins Daniel (Los Altos CA) Mintz Doron (Sunnyvale CA), Method and system for creating and validating low level description of electronic design from higher level, behavior-ori.
    상세보기
  44. Dangelo Carlos ; Nagasamy Vijay ; Ponukumati Vijayanand, Method and system for creating and validating low-level description of electronic design.
    상세보기
  45. Rostoker Michael D. ; Dangelo Carlos ; Bair Owen S., Method and system for creating and verifying structural logic model of electronic design from behavioral description, i.
    상세보기
  46. Dangelo Carlos (Los Gatos CA) Mintz Doron (Sunnyvale CA) Vafai Manouchehr (Los Gatos CA), Method and system for creating, validating, and scaling structural description of electronic device.
    상세보기
  47. Dangelo Carlos ; Mintz Doron ; Vafai Manouchehr, Method and system for creating, validating, and scaling structural description of electronic device.
    상세보기
  48. Iida Toshiya,JPX ; Nakada Yasuhiro,JPX, Method and system for drawing network diagrams.
    상세보기
  49. Arquie, Louis M.; Hamilton, David B.; Lubeck, Mark R., Method and system for generating a network monitoring display with animated utilization information.
    상세보기
  50. O'Riordan, Donald J., Method and system for navigating hierarchical levels using graphical previews.
    상세보기
  51. Duncan Robert G. (Castroville CA), Method for entering state flow diagrams using schematic editor programs.
    상세보기
  52. Duncan Robert G. (Castroville CA), Method for entering state flow diagrams using schematic editor programs.
    상세보기
  53. Merklein, Thomas, Method for operating and device for monitoring a technical installation.
    상세보기
  54. Barrientos Carlo E., Method for performing floorplan timing analysis by selectively displaying signal paths based on slack time calculations.
    상세보기
  55. Barrientos Carlo E., Method for performing floorplan timing analysis using multi-dimensional feedback in a histogram and integrated circuit m.
    상세보기
  56. Barrientos Carlo E., Method for performing floorplan timing analysis using multi-dimensional feedback in a spreadsheet with computed hyperlin.
    상세보기
  57. Arquie, Louis, Method for routing connections in the display of a network topology.
    상세보기
  58. Duncan Robert G., Method for spawning two independent states in a state flow diagram.
    상세보기
  59. Wheeler,William R.; Adiletta,Matthew J.; Clark,Christopher; Fennel,Timothy J., Model-based logic design.
    상세보기
  60. Wheeler,William R.; Fennell,Timothy J., Modeling a logic design.
    상세보기
  61. Phaik, Chin Choi, Navigation tool for connectors.
    상세보기
  62. Wolrich,Gilbert; Adiletta,Matthew J.; Gorius,Aaron; Hooper,Donald F.; Carrigan,Douglass; Vora,Chandra, Network device switch.
    상세보기
  63. Chakradhar Srimat T. (No. Brunswick NJ), Optimal retiming of synchronous logic circuits.
    상세보기
  64. Cummins,Charles; Melander,Greg S.; Ligameri,Mark R., Portion of a display screen.
    상세보기
  65. Blomquist, Michael L., Programmable medical infusion pump.
    상세보기
  66. Blomquist, Michael L., Programmable medical infusion pump displaying a banner.
    상세보기
  67. Fennell, Timothy J.; Wheeler, William R., Representing a simulation model using a hardware configuration database.
    상세보기
  68. Lawman Gary R., Schematic design entry with annotated timing.
    상세보기
  69. Blomquist, Michael L., Server for medical device.
    상세보기
  70. Wheeler,William R.; Adiletta,Matthew J., Simulating a logic design.
    상세보기
  71. Gabbert,Adam; Washington,Jeff, System and method for creating a graphical program including a plurality of portions to be executed sequentially.
    상세보기
  72. Rostoker Michael D. ; Watkins Daniel R., System and method for creating and validating structural description of electronic system from higher-level and behavior.
    상세보기
  73. Harmon Samuel T. (3525 Dandridge Dayton OH 45407) Harmon M. Tracey (3525 Dandridge Dayton OH 45407), System for graphically generating the sequence and temporal relationship between tasks in a project.
    상세보기
  74. Blomquist Michael L., Systems and methods for communicating with ambulatory medical devices such as drug delivery devices.
    상세보기
  75. Ladin, Karl L.; Strom, James D., Systems, methods and computer products for traversing schematic hierarchy using a scrolling mechanism.
    상세보기
  76. Giramma David J. ; Roth Thomas E. ; Kozber Oliver W., Tool, system and method for dynamic timing analysis in a plural-instance digital system simulation.
    상세보기
  77. Schietinger, Mathias, Training and simulation device for electric functional process in electric, electromechanical and electrofluidic systems.
    상세보기
  78. Thomas, Terrance L.; Boose, John Henry, Wire fault illumination and display.
    상세보기
  79. Thomas, Terrance L.; Call, Camron Ravell; Rosman LaFever, Monica C.; Chaplin, Carey, Wire system assessment.
    상세보기

관련 콘텐츠

섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로