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[미국특허] High speed serial data link 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04L-007/04
출원번호 US-0256954 (1989-10-30)
발명자 / 주소
  • Bryans Mark A. (Dallas TX) Cline James H. (Allen TX) Frazee Francis B. (Plano TX) Lehman Lark E. (Colorado Springs CO)
출원인 / 주소
  • Texas Instruments Incorporated (Dallas TX 02)
인용정보 피인용 횟수 : 33  인용 특허 : 3

초록

A high bit-rate serial communications link encodes data by inserting non-data 0\s and 1\s. These extra bits are removed by a decoder at the receiving end of the link. Transmission of data can be made along optical fibers.

대표청구항

A system for transmitting data using an asynchronous serial data link, comprising: (a) an encoder for converting data words represented in parallel format into serial bit streams representing each data word, each data word having a unique start-of-word sequence, said encoder including means for insu

이 특허에 인용된 특허 (3) 인용/피인용 타임라인 분석

  1. Brown William W. (Sunnyvale CA) Hanson Delon C. (Los Altos CA) Hornak Thomas (Los Altos CA), Apparatus and method for transmitting binary-coded information.
  2. Bickers Lawrence (Ipswich GB2), Flexible regenerator.
  3. Furse Anthony G. (15 Centennial Ave. Lane Cove N.S.W. 2066 AUX), Method of multi-level encoding including synchronizing signals.

이 특허를 인용한 특허 (33) 인용/피인용 타임라인 분석

  1. Chen-Chi Chou ; Bruce Fairman, Apparatus for and method of separating header information from data in an IEEE 1394-1995 serial bus network.
  2. Lee, Terry R.; Jeddeloh, Joseph M., Dynamic synchronization of data capture on an optical or other high speed communications link.
  3. Lee, Terry R.; Jeddeloh, Joseph M., Dynamic synchronization of data capture on an optical or other high speed communications link.
  4. Lee,Terry R.; Jeddeloh,Joseph M., Dynamic synchronization of data capture on an optical or other high speed communications link.
  5. Ramamurthy Krishnan ; Pan Rong ; MacTaggart Ross ; Ducaroir Francois, High speed phase locked loop test method and means.
  6. Smyers,Scott David, IEEE 1394-based protocol repeater.
  7. Li, Shu, Increasing storage areal density using predictive data locations.
  8. Harrison, Ronnie M., Method and apparatus for generating a phase dependent control signal.
  9. Harrison, Ronnie M., Method and apparatus for generating a phase dependent control signal.
  10. Harrison, Ronnie M., Method and apparatus for generating a phase dependent control signal.
  11. Harrison,Ronnie M., Method and apparatus for generating a phase dependent control signal.
  12. Harrison, Ronnie M., Method and apparatus for generating a sequence of clock signals.
  13. Harrison, Ronnie M., Method and apparatus for generating a sequence of clock signals.
  14. Harrison,Ronnie M., Method and apparatus for generating a sequence of clock signals.
  15. Manning, Troy A., Method and apparatus for generating expect data from a captured bit pattern, and memory device using same.
  16. Manning,Troy A., Method and apparatus for generating expect data from a captured bit pattern, and memory device using same.
  17. Manning,Troy A., Method and apparatus for generating expect data from a captured bit pattern, and memory device using same.
  18. Johnson,Brian; Harrison,Ronnie M., Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same.
  19. Daane John, Method for interleaving network traffic over serial lines.
  20. Stone, Glen David; Smyers, Scott David; Faiman, Bruce Alan; Eyer, Mark Kenneth, Method of and apparatus for providing isochronous services over switched ethernet including a home network wall plate having a combined IEEE 1394 and ethernet modified hub.
  21. Stone, Glen David; Smyers, Scott David; Fairman, Bruce Alan; Eyer, Mark Kenneth, Method of and apparatus for providing isochronous services over switched ethernet including a home network wall plate having a combined IEEE 1394 and ethernet modified hub.
  22. Penninckx Denis,FRX, Method of putting binary data on an optical carrier wave, and a transmission system using the method.
  23. Shintomi, Yuji, Parity data encoder for serial communication.
  24. McClellan Brett ; Leung Michael ; Fu Leo ; Jeon Taehyun, Parity insertion with precoder feedback in a read channel.
  25. Ramamurthy Krishnan ; Miller Marc ; Pan Rong ; Ducaroir Francois, Programmable synchronization character.
  26. Troxel Robert Vincent ; Cardon Jay Edward ; Ninh Loi Quang, Quad cable construction for IEEE 1394 data transmission.
  27. Ramamurthy Krishnan ; Pan Rong ; Ducaroir Francois, Self test of core with unpredictable latency.
  28. Walker,Samuel, Serializer clock synthesizer.
  29. Ayyagari, Ravishankar S.; Joshi, Supreet; Patil, Bharath; Boddhapu, Madhav Tejaswi, Single wire communications interface and protocol.
  30. James,Ralph, System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding.
  31. James,Ralph, System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding.
  32. James,Ralph, System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding.
  33. Ducaroir Francois ; Pan Rong ; Ramamurthy Krishnan, Wrap-back test system and method.

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