초록 ▼

A frequency synthesizer which uses a direct digital synthesizer (DDS) to generate a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. The DDS output signal is bandpass filtered and amplitude limited to reduce spurious noise. In one embodiment, the DDS

A frequency synthesizer which uses a direct digital synthesizer (DDS) to generate a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. The DDS output signal is bandpass filtered and amplitude limited to reduce spurious noise. In one embodiment, the DDS frequency synthesizer is coupled to a phase lock loop which receives the DDS generated reference signal and a divide-by-N signal for generating an output signal at a frequency determined by the divide-by-N signal. The frequency resolution of the phase lock loop is N times the reference signal. In a second embodiment, the DDS is incorporated within the feedback path of the phase lock loop. An input reference frequency signal is provided to the phase lock loop with the DDS clock signal provided as a function of the phase lock loop output frequency. The DDS receives an input frequency control signal which determines the DDS step size. The synthesizer output frequency is a function of the input reference frequency, the number of bits in the digital word of the frequency control signal and the DDS step size as determined by the frequency control signal. Optional dividers may be provided in the feedback path which may further affect the synthesizer output frequency.

대표청구항 ▼

A method for synthesizing frequency comprising the steps of: providing a direct digital synthesizer (DDS) capable of digitally generating an analog DDS output signal at a frequency selected from a plurality of frequencies; providing externally generated phase data and clock signals to said DDS; gene

A method for synthesizing frequency comprising the steps of: providing a direct digital synthesizer (DDS) capable of digitally generating an analog DDS output signal at a frequency selected from a plurality of frequencies; providing externally generated phase data and clock signals to said DDS; generating in said DDS, in response to said providing of said phase data and said clock signal, said DDS output signal of said selected frequency; filtering said DDS output signal; and amplitude limiting said DDS output signal.