[특허]Integral heatsink semiconductor package

Integral heatsink semiconductor package 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-021/60 H01L-023/02 H02B-001/00
출원번호	US-0682771 (1991-04-09)
발명자 / 주소	Kellerman Dave (Littleton MA) Hannemann Robert J. (Wellesley MA) Czerepak Stanley J. (Burlington MA) Simcoe Robert J. (Westborough MA)
출원인 / 주소	Digital Equipment Corporation (Maynard MA 02)
인용정보	피인용 횟수 : 54 인용 특허 : 0

초록 ▼

An injection molded aluminum nitride heatsink forms the substrate of an integral heatsink semiconductor package in which a semiconductor chip is attached directly to the integrated heatsink forming an intimate thermal relationship between the heat generating source and the heat dissipating means. In a first embodiment, a planar surface of the heatsink component provides the substrate for the attachment of a semiconductor chip and a multilayer housing formed from a plurality of layers of dielectric glass ceramic lamina and conductive circuit layers. The multilayer housing is formed on top of the heatsink substrate creating a recessed cavity in which the semiconductor die sits and is attached directly to the heatsink. The semiconductor chip is attached to the circuit layers of the housing through any of the known electrical connection methods, such as wirebonding or tab tape. A cover plate is mounted over the cavity. In a second embodiment a recessed cavity with a planar surface is formed directly in the heatsink and the semiconductor chip is mounted directly to the surface within the cavity. A plurality of tab leads are connected to the semiconductor and a cover plate is mounted over the cavity sealing the semiconductor and its electrical connections inside.

대표청구항 ▼

A method of fabricating an integral heatsink semiconductor package comprising the steps of: providing an injection molded aluminum nitride heatsink having a first planar surface and a second opposing surface having heat dissipating means thereon; providing a plurality of layers of conductive metal etchings comprising at least one ground layer, at least one power layer and at least one signal layer; providing a plurality of dielectric lamina having at least one central aperture and a predetermined system of via formed therein, said plurality of lamina configured, dimensioned and arranged as to create at least one tiered cavity when laminated together; laminating one of said plurality of dielectric lamina to said first planar surface of said heatsink; filling said via of said lamina with conductive metal for the interconnection of said layers of said metal etching; screen printing one of said plurality of layers of metal etching onto said laminated lamina; repeating the steps of laminating, filling and screen printing until said process forms a multilayer housing on said first surface of said heatsink, said housing having at least one tiered cavity formed therein, said tiers exposing selected ends of said metal etching and forming a shelf for the attachment of a cover, said housing further having an external layer of lamina; providing metal contact pads for the interconnection of said semiconductor package with a printed wiring board; screen printing said contact pads on said external layer of lamina; firing said structure under sufficient temperature and pressure to bond said heatsink and said lamina together; providing at least one semiconductor chip; attaching said at least one semiconductor chip to said first surface of said heatsink within said recessed cavity of said housing; providing means for connecting said at least one semiconductor chip to said exposed ends of said metal etchings; connecting said semiconductor to said exposed ends of said metal etchings using said connecting means; providing at least one cover plate; mounting said cover plate over said recessed cavity of said housing; and sealing said cover plate.

이 특허를 인용한 특허 (54)

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