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Tamper resistant module having logical elements arranged in multiple layers on the outer surface of a substrate to prote 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G11C-005/00
  • G06F-012/16
출원번호 US-0845767 (1992-03-02)
우선권정보 JP-0195847 (1988-08-05)
발명자 / 주소
  • Mori Ryoichi (24-12
  • Hakusan 1-chome Bunkyo-ku
  • Tokyo JPX)
인용정보 피인용 횟수 : 157  인용 특허 : 0

초록 ▼

The reliability of a tamper resistant module for safeguarding stored information, e.g. in an electronic computer system, is improved to deny access to the system by an unauthorized person or at least to a specific portion of the system. For this purpose, the module has for example a pair of substrat

대표청구항 ▼

A tamper resistant module for safeguarding stored information comprising: substrate means having an inner surface and an outer surface, memory means for storing confidential data, said memory means being confined by said inner surface of said substrate; means for preventing tampering, said tamper pr

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