이 특허를 인용한 특허 (39)

1. Smith Gerald E., Adaptive power failure recovery.

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2. Cho, Byungcheol, Alarm-based backup and restoration for a semiconductor storage device.

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3. Osaki Tomoko,JPX ; Tenma Shoji,JPX, Apparatus and method for controlling power supply for computer system during service interruption.

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4. Saegusa Takashi,JPX ; Fujiwara Hisatoshi,JPX, Apparatus having a first microcomputer for reading first and second data from a non-volatile memory and processing the s.

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5. Fukumori,Mitsuo, Backup power supply device for a storage device.

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6. Leete, Brian A.; Green, Carl I., Computer memory power backup.

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7. Ahn Hee-Geol,KRX, Computer system with an advanced power saving function and an operating method therefor.

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8. Tojo, Mihoko; Kobayashi, Hidefumi; Oota, Yusuke; Hayashi, Satoshi; Umezawa, Keiichi, Data storage device and method.

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9. Taleb, Hassan; Ludet, David; Delaunay, Eric; Beaunoir, Nicolas; Furet, Thierry; Bellanger, Franck; Chauvier, Laurent; Proust, Laurent; Douat, Laurent, Digital television decoder.

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10. Simionescu Horia Cristian ; Bui Luan Kha ; Henson James A. ; Gold Clifford M., Embedded cache manager.

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11. Brant William Alexander ; Nielson Michael Edward ; Howard Gary Ward, Fault tolerant controller system and method.

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12. Muir, Robert Lindley; Boesen, John; Jones, Mike, Gaming machine power fail enhancement.

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13. Muir, Robert Lindley; Boesen, John; Jones, Mike, Gaming machine power fail enhancement.

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14. Muir, Robert Lindley; Boesen, John; Jones, Mike, Gaming machine power fail enhancement.

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15. Berke,Stuart; Chiasson,Shane, Information handling system including a memory device capable of being powered by a battery.

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16. Zhu, Limin; Speers, Theodore; Bakker, Gregory, Integrated circuit device having state-saving and initialization feature.

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17. Zhu,Limin; Speers,Theodore; Bakker,Gregory, Integrated circuit device having state-saving and initialization feature.

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18. Balasubramanian, Rabindranath; Kolkind, Kurt; Bakker, Gregory, Integrated circuit including programmable logic and external-device chip-enable override control.

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19. Yamada Yuichi (Kawasaki JPX) Kizu Hirohiko (Kawasaki JPX), Method and apparatus allowing hot replacement of circuit boards.

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20. Lim Jae-Doo,KRX ; Lee Chang-Ho,KRX, Method and apparatus for executing a scheduled operation after wake up from power off state.

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21. Green Lawrence M. ; Hammon Richard L., Method and circuit for maintaining charge in a backup battery.

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22. Garg, Manish; Rao, Kiran Batni Raghavendra; Pineda De Gyvez, Jose De Jesus, Method for reducing power consumption in a state retaining circuit, state retaining circuit and electronic device.

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23. Liong Thomas Singkiat (San Jose CA) Rao Krishnakumar (Fremont CA) Gupta Parveen Kumar (Fremont CA), Modular cache memory battery backup system.

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24. Liong Thomas Singkiat ; Nagaraj Ashwath ; Rao Krishnakumar, Modular mirrored cache memory battery backup system.

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25. Stoneback, Dean A., Parallel split powering.

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26. Yamanaka, Ryoichiro; Fukuoka, Yuji, Power consumption reduction device for data backup.

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27. Lin James C., Power management architecture for a reconfigurable write-back cache.

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28. Matsui, Satoshi, Power supply voltage regulator circuit and microcomputer.

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29. Balasubramanian, Rabindranath; Zhu, Limin; Bakker, Gregory, Programmable system on a chip for temperature monitoring and control.

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30. Balasubramanian,Rabindranath; Zhu,Limin; Bakker,Gregory, Programmable system on a chip for temperature monitoring and control.

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31. Hicksted Richard L. ; Glaser Michael,DEX, Reserved cylinder for SCSI device write back cache.

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32. Fleischmann, Marc; Anvin, H. Peter, Restoring processor context in response to processor power-up.

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33. Fuller Samuel (Austin TX), Secondary cache system for portable computer.

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34. Hirofuji Susumu,JPX ; Kaneko Hiroyuki,JPX ; Yoneyama Tadashi,JPX, Semiconductor disk device having a large capacity of quick-access memory and hard disk for backup and its data storage m.

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35. Robert E. Costello, Static random access memory backup.

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36. Kawakubo,Yosuke, Storage unit having normal and backup power sources for use in retaining data when normal power fails.

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37. Madter, Richard C.; Werder, Karin Alicia; Huang, Wei Yao, System and method for automatically saving memory contents of a data processing device on power failure.

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38. Fleischmann, Marc; Anvin, H. Peter, System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored.

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39. Fleischmann, Marc; Anvin, H. Peter, System and method for saving and restoring a processor state without executing any instructions from a first instruction set.

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