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Method for forming a conductive pattern on an integrated circuit 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-003/02
출원번호 US-0743462 (1991-08-09)
발명자 / 주소
  • Boyd Melissa D. (Corvallis OR)
출원인 / 주소
  • Hewlett-Packard Company (Palo Alto CA 02)
인용정보 피인용 횟수 : 101  인용 특허 : 0

초록 ▼

A method for processing an integrated circuit of the type having conductive die bond pads thereon. The fabricated IC is coated with a layer of photoresist. The photoresist is exposed to create a pattern which includes windows over the pads and a connection between at least two of the pads. The expos

대표청구항 ▼

A method for processing an integrated circuit of the type having conductive pads thereon which provide contact to different parts of the circuit, said method comprising the steps of: coating the circuit with a layer of photoresist; creating a lithographically defined pattern in the photoresist which

이 특허를 인용한 특허 (101)

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  9. Lee, Jin-Yuan; Lin, Mou-Shiung; Huang, Ching-Cheng, Chip structure and process for forming the same.
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  10. Lee, Jin-Yuan; Lin, Mou-Shiung; Huang, Ching-Cheng, Chip structure and process for forming the same.
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  12. Kuo, Nick; Chou, Chiu-Ming; Chou, Chien-Kang; Lin, Chu-Fu, Chip structure with bumps and testing pads.
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  34. Lee, Jin-Yuan; Lin, Mou-Shiung; Huang, Ching-Cheng, Low fabrication cost, fine pitch and high reliability solder bump.
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  42. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
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  44. Grandmont Paul E. ; Fung Clifford D., Method for overpressure protected pressure sensor.
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  75. Huang, Ching-Cheng; Lin, Chuen-Jye; Lei, Ming-Ta; Lin, Mou-Shiung, Reliable metal bumps on top of I/O pads after removal of test probe marks.
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