[특허]Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer

Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-021/44 H01L-021/48
출원번호	US-0677681 (1991-03-29)
발명자 / 주소	Somekh Sasson (Los Altos Hills CA) Nulman Jaim (Palo Alto CA) Chang Mei (Cupertino CA)
출원인 / 주소	Applied Materials, Inc. (Santa Clara CA 02)
인용정보	피인용 횟수 : 78 인용 특허 : 0

초록 ▼

An improved process is described for forming planar tungsten-filled contacts to a silicon substrate in contact openings through an insulating layer which provides for the formation of titanium silicide in and on the silicon surface at the bottom of the contact openings to provide low resistance silicide interconnections between the silicon substrate and the tungsten. A titanium nitride layer is formed over the titanium silicide and on the surfaces of the insulation layer, including the top surface of the insulation layer and the sidewall surfaces of the contact openings through the insulating layer. This titanium nitride layer provides a nucleation layer which permits a good bond to form from the tungsten through the titanium nitride and titanium silicide in the contact openings to the silicon substrate; and from the tungsten through the titanium nitride layer to the insulator material such as silicon dioxide (SO2), resulting in the formation of low resistance and low defect density contacts.

대표청구항 ▼

A process for forming low resistance, low defect density, planar electrical contacts through a SiO2 insulation layer to a silicon semiconductor wafer thereunder which comprises: a) sputtering depositing, in a PVD station in a vacuum apparatus, a layer of titanium over: i) exposed surfaces of said insulation layer, including sidewall insulation surfaces of a contact opening previously formed through said insulation layer to said silicon wafer; and ii) a surface of said silicon wafer exposed by said contact opening; b) transferring said titanium-coated wafer from said PVD station to an annealing station in a vacuum apparatus without exposing said titanium to oxygen-containing gases; c) initially annealing said deposited titanium at said annealing station within a temperature range of from about 500°C. to about 695°C. in the presence of a nitrogen-bearing gas, and in the absence of an oxygen-containing gas, to form titanium silicide over the exposed silicon wafer surface at the bottom of said contact opening and titanium nitride over said insulation surface and said titanium silicide; d) further annealing said titanium nitride and said titanium silicide within a temperature range of from about 800°C. to about 900°C.; e) transferring said wafer from said annealing station to a CVD station in a vacuum apparatus; f) depositing a layer of tungsten by a CVD process over: i) said titanium nitride surfaces on said SiO2 insulating layer; and ii) said titanium nitride on said titanium silicide formed over said silicon substrate; to fill said contact opening with tungsten and form a planarized layer of tungsten over said titanium nitride-coated insulation layer; to thereby form a good electrical contact between said tungsten in said contact opening and said silicon wafer through said titanium nitride and titanium silicide, and a good bond between said tungsten and said titanium nitride formed on said surfaces of said insulating layer.

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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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연합인증

Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer 원문보기

초록 ▼

대표청구항 ▼

연구과제 타임라인

이 특허를 인용한 특허 (78)

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연합인증

Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer 원문보기

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연구과제 타임라인

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이 특허를 인용한 특허 (78)

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