[특허]Toroidal computer memory for serial and parallel processors

[미국특허] Toroidal computer memory for serial and parallel processors 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06F-012/02
출원번호	US-0546595 (1990-06-29)
발명자 / 주소	Parks Allen D. (Fredericksburg VA) Perry James C. (Fredericksburg VA)
출원인 / 주소	The United States of America as represented by the Secretary of the Navy (Washington DC 06)
인용정보	피인용 횟수 : 21 인용 특허 : 0

초록 ▼

The toroidal computer memory system utilizes toroidal memory paths in its architecture to enable memory locations along those paths to be obtained in a single access, as compared to multiple accesses typically required by conventional linear computer memory. The storage/retrievable media is designed to replicate paths on the surface of a torus. By defining certain parameters and the mathematical properties of these memory paths in the electronics of a controller, points on the memory paths can be accessed from the storage/retrieval media more efficiently than conventional computer memory.

대표청구항 ▼

In a computer memory comprised of a plurality of independently addressable memory circuits arranged to have n1′groups of 1bit words addressable in a parallel fashion and n2′addresses within each of aid groups wherein n1′and n2′are the same prime number, a method for providing simultaneous access to uniquely addressed 1-bit memory circuits in each of said groups wherein said simultaneous access occurs along a simulated toroidal surface path representation of said memory, said method comprising the steps of: selecting path slope parameters n and m, n≠0, wherein a path slope m/n relates to the slope of a line on a plane model rectangular representation of a torus, said plane model having a (0,0) origin coordinate, I-axis indices extending n1=(n1′-1) units from said origin coordinate, and J-axis indices extending n2=(n2′-1) units from said origin coordinate, wherein said I-axis units are indexed in accordance with said groups and said J-axis units are indexed in accordance with said addresses; generating n1′address pairs in a memory controller, each of said address pairs having a coordinate identifying one of said groups in accordance with (mod(kn, n1′)) and a coordinate identifying one of said addresses in accordance with (mod(km,n2′)) for k=0 to n 1; and accessing, via a data bus having n1′parallel data lines, said memory circuits identified by said n1′address pairs.

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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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[미국특허] Toroidal computer memory for serial and parallel processors 원문보기