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| 국가/구분 | United States(US) Patent 등록 |
|---|---|
| 국제특허분류(IPC7판) |
|
| 출원번호 | US-0933810 (1992-08-24) |
| 우선권정보 | JP-0238713 (1991-08-26); JP-0030220 (1992-01-21) |
| 발명자 / 주소 |
|
| 출원인 / 주소 |
|
| 인용정보 | 피인용 횟수 : 318 인용 특허 : 0 |
An IGFET has differential crystallinity in offset regions near the source-channel and drain-channel boundaries. In one embodiment, an offset region with crystallinity different from that of an adjacent region is provided between the channel and at least one of the source and drain regions. An oxide
An IGFET has differential crystallinity in offset regions near the source-channel and drain-channel boundaries. In one embodiment, an offset region with crystallinity different from that of an adjacent region is provided between the channel and at least one of the source and drain regions. An oxide film may be provided to cover the surface of the gate electrode, formed by anodizing the surface of the gate electrode, and this layer may be used as a mask when forming the crystallinity offset regions.
An insulated gate field effect transistor comprising: a semiconductor layer formed on a substrate; source and drain regions formed within said semiconductor layer; a channel region extending between said source and drain regions within said semiconductor layer; a gate electrode formed on said channe
An insulated gate field effect transistor comprising: a semiconductor layer formed on a substrate; source and drain regions formed within said semiconductor layer; a channel region extending between said source and drain regions within said semiconductor layer; a gate electrode formed on said channel region through a gate insulating layer therebetween; and an anodic oxide film of said gate electrode covering a surface of said gate electrode wherein at least a lightly doped region is formed between said channel and at least one of said source and drain regions.
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