[특허]Address method for computer graphics system

[미국특허] Address method for computer graphics system 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06F-015/00
출원번호	US-0748353 (1991-08-21)
발명자 / 주소	Case, Colyn Meinerth, Kim Irwin, John Fanning, Blaise
출원인 / 주소	Digital Equipment Corporation
대리인 / 주소	Cefalo, AlbertYoung, BarryMaloney, Denis
인용정보	피인용 횟수 : 64 인용 특허 : 4

초록 ▼

In a computer graphics system, an address generator processes physical and virtual addresses using a common command set. The address generator formulates addresses as a function of distance from the origin of the desired destination area in a destination memory to the requested position in the destination area. A plurality of context drawing commands is used to define a desired context in which drawing graphics commands operate. Different parts of the context are changeable/redefinable independently of the other parts. Graphics commands have a format of multiple fields having corresponding parameters arranged in order of common use of the parameter such that fields of less commonly used parameters are at an omittable end of the format. Raster drawing commands are delimited by a beginning and end indicator to form a drawing unit. For clip list processing, a drawing unit is stored as a single occurrence in the system command buffer.

대표청구항 ▼

1. A method of addressing memory in a computer system comprising the steps of: providing a destination memory having a destination area, said destination area having an origin; determining, for a given position in said destination area of said destination memory, a working distance from the origin of the destination area to the given position along one axis of the destination area; and determining a destination memory address for addressing said given position in said destination memory as a function of the determined working distance. 2. A method as claimed in claim 1 wherein the step of determining a destination memory address further includes: providing a differential distance value representing the distance between the origin of the destination area and initial memory position of the destination memory along the one axis; and summing the determined working distance and the differential distance value to provide said destination memory address for addressing said destination memory. 3. A method as claimed in claim 1 further comprising the steps of: providing a source memory having a source area, said source area having an origin, said source area for providing data to the given position; determining a source memory address as a function of the determined working distance from the origin of the destination area to the given position along one axis of the destination area, wherein said step of determining a source memory address further comprising the steps of: providing a differential distance value representing the distance between an initial source memory address and an address of said origin of the source area; and summing the determined working distance between the given position in the destination area and the origin of the destination area to the differential distance value. 4. A method as claimed in claim 1 further comprising the steps of: providing a stencil memory source of data having a stencil initial address, the stencil memory including a stencil area having a stencil origin address, said stencil area holding data of interest to be provided to the destination area; and forming stencil memory addresses of positions of data in the stencil area said step of forming further comprising the steps of: providing a differential distance value representing the distance between the stencil origin address and the stencil initial address along one axis; and summing the differential distance value to the working distance between the origin of the destination area and a corresponding position of data in the destination area. 5. A method as claimed in claim 1, wherein said axis is an X axis of the destination area and the method further comprises the steps of: determining and storing an offset distance from the origin of the destination area to the given position along a Y-axis perpendicular to the X axis, with said offset distance providing a Y-axis component for addressing the destination memory at the given position. 6. The method according to claim 5, wherein the step of specifying and storing further comprises the step of: determining, for a plurality of additional destination memories having a width equal to a width of said destination memory of the desired destination area, addresses as a function of the offset value, said addresses having a Y-axis component provided by a common computation to preclude recomputation of the Y-axis component of the respective destination memory address for each of the plurality of additional destination memories. 7. A method as claimed in claim 1 further comprising the steps of: providing a Y origin distance value representing a distance from said initial memory position of the destination memory to the origin of the destination area along a Y-axis perpendicular to the one axis; specifying an offset distance from the origin of the destination area to the given position along the Y-axis and providing a Y-axis component for addressing the destination memory at the given position by summing the Y-origin distance and the offset distance. 8. A method as claimed in claim 7 further comprising the step of: updating the address of a position along the Y-axis in each of desired source and destination areas such that for vertically adjacent operations, addresses of positions in each of desired source and destination memories are provided from specification of a desired position in the destination area along the one axis and a width of the destination memory along the one axis. 9. An apparatus comprising: a source memory having an x and y axis, and an initial source memory address for storing data, said source memory including a source area within said source memory and having an origin source address; a destination memory having an x and y axis, said destination memory having an initial destination memory address and including a destination area within said destination memory having a plurality of memory locations for storing data, said destination area having an origin destination address; an address generator, coupled to said source memory and to said destination memory, to provide a respective source memory address to said source memory and a destination memory address to said destination memory, said address generator including: means for determining a working distance along the x-axis between said origin destination address and one of said plurality of memory locations for storing data; and means for providing said source memory addresses as a function of said working distance. 10. The apparatus of claim 9, wherein said address generator includes for each of said source and destination memories; a y-base register for storing a y-axis index of the respective origin address for the respective memory; y-step register for storing a number of pixels in a respective scanline of the respective area; a x-bias register for storing a difference between the origin of the respective memory and the working distance value of destination memory; an x-position register for storing the working distance value; a destination y-origin register for storing the y-axis address of the destination area; and wherein said source memory address is determined by adding said respective y-base register contents to said x-bias register contents and to said x-position register. 11. The apparatus of claim 10 further comprising: a register for storing an address offset value; and summing means for adding said address offset value to the contents of said destination y-origin value and the contents of said x-position register to provide said destination memory address.

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[미국특허] Address method for computer graphics system 원문보기

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