이 특허를 인용한 특허 (185)

1. Zhang, Hongyong, Active matrix type liquid crystal display device.

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2. Im, James S., Advanced excimer laser annealing for thin films.

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3. Radosavljevic,Marko; Majumdar,Amlan; Doyle,Brian S.; Kavalieros,Jack; Doczy,Mark L.; Brask,Justin K.; Shah,Uday; Datta,Suman; Chau,Robert S., Block contact architectures for nanoscale channel transistors.

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4. Lindert, Nick; Cea, Stephen M., Bulk non-planar transistor having strained enhanced mobility and methods of fabrication.

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5. Lindert,Nick; Cea,Stephen M., Bulk non-planar transistor having strained enhanced mobility and methods of fabrication.

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6. Doyle, Brian S.; Jin, Been-Yih; Kavalieros, Jack T.; Datta, Suman; Brask, Justin K.; Chau, Robert S., CMOS devices with a single work function gate electrode and method of fabrication.

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7. Im, James S.; Chung, Ui-Jin, Collections of laterally crystallized semiconductor islands for use in thin film transistors.

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8. Im, James S.; Chung, Ui-Jin, Collections of laterally crystallized semiconductor islands for use in thin film transistors.

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9. Brask, Justin K.; Datta, Suman; Doczy, Mark L.; Blackwell, James M.; Metz, Matthew V.; Kavalieros, Jack T.; Chau, Robert S., Dielectric interface for group III-V semiconductor device.

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10. Yamazaki, Shunpei; Akimoto, Kengo; Umezaki, Atsushi, Display device.

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11. Yamazaki, Shunpei; Akimoto, Kengo; Umezaki, Atsushi, Display device.

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12. Yamazaki, Shunpei; Akimoto, Kengo; Umezaki, Atsushi, Display device.

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13. Yamazaki, Shunpei; Akimoto, Kengo; Umezaki, Atsushi, Display device.

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14. Yamazaki, Shunpei; Akimoto, Kengo; Umezaki, Atsushi, Display device and method for manufacturing the same.

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15. Yamazaki, Shunpei; Akimoto, Kengo; Umezaki, Atsushi, Display device and method for manufacturing the same.

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16. Yamazaki, Shunpei; Akimoto, Kengo; Umezaki, Atsushi, Display device and method for manufacturing the same.

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17. Yamazaki, Shunpei; Akimoto, Kengo; Umezaki, Atsushi, Display device comprising an oxide semiconductor.

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18. Hongyong Zhang JP, Electro-optical device.

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19. Yamazaki Shunpei,JPX ; Takemura Yasuhiko,JPX, Electro-optical device incorporating a peripheral dual gate electrode TFT driver circuit.

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20. Radosavljevic, Marko; Datta, Suman; Doyle, Brian S.; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Majumdar, Amian; Chau, Robert S., Field effect transistor with metal source/drain regions.

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21. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.

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22. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.

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23. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.

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24. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.

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25. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.

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26. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.

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27. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.

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28. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.

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29. Sakamoto Kunihiro,JPX, Field-effect transistor and method of manufacturing same.

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30. Buynoski,Matthew S.; An,Judy Xilin; Yu,Bin, FinFET device with multiple channels.

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31. Buynoski, Matthew S.; An, Judy Xilin; Wang, Haihong; Yu, Bin, FinFET device with multiple fin structures.

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32. Lin, Ming-Ren; Wang, Haihong; Yu, Bin, FinFET device with multiple fin structures.

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33. Im, James S., Flash lamp annealing crystallization for large area thin films.

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34. Meyers, Brian R.; Smith, Gregory R., Framework for user interaction with multiple network devices.

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35. Brunner Timothy A. (Ridgefield CT) Hsu Louis L. (Fishkill NY) Mandelman Jack A. (Stormville NY) Wang Li-Kong (Montvale NJ), High performance multi-mesa field effect transistor.

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36. Fried, David M.; Nowak, Edward J.; Rankin, Jed H., Implanted asymmetric doped polysilicon gate FinFET.

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37. Fried,David M.; Nowak,Edward J.; Rankin,Jed H., Implanted asymmetric doped polysilicon gate FinFET.

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38. Chang, Peter L. D.; Doyle, Brian S., Independently accessed double-gate and tri-gate transistors.

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39. Chang, Peter L. D.; Doyle, Brian S., Independently accessed double-gate and tri-gate transistors in same process flow.

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40. Chang, Peter L. D.; Doyle, Brian S., Independently accessed double-gate and tri-gate transistors in same process flow.

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41. Dennison Charles H. ; Manning Monte, Integrated circuitry and thin film transistors.

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42. Im, James S., Laser-irradiated thin films having variable thickness.

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43. Datta,Suman; Brask,Justin K.; Kavalieros,Jack; Doyle,Brian S.; Dewey,Gilbert; Doczy,Mark L.; Chau,Robert S., Lateral undercut of metal gate in SOI device.

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44. Yamazaki, Shunpei; Sakata, Junichiro; Sakakura, Masayuki; Oikawa, Yoshiaki; Okazaki, Kenichi; Maruyama, Hotaka, Light-emitting device and method for manufacturing the same.

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45. Yamazaki, Shunpei; Sakata, Junichiro; Sakakura, Masayuki; Oikawa, Yoshiaki; Okazaki, Kenichi; Maruyama, Hotaka, Light-emitting device and method for manufacturing the same.

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46. Yamazaki, Shunpei; Sakata, Junichiro; Sakakura, Masayuki; Oikawa, Yoshiaki; Okazaki, Kenichi; Maruyama, Hotaka, Light-emitting device and method for manufacturing the same.

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47. Im, James S.; Van Der Wilt, Paul C., Line scan sequential lateral solidification of thin films.

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48. Lee, Seok Woo, Liquid crystal display device having dummy contact holes and fabrication method thereof.

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49. Lee, Seok Woo, Liquid crystal display device with improved heat dissipation properties and fabrication method thereof, having dummy contact hole between channels.

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50. Okazaki, Kenichi; Oikawa, Yoshiaki; Maruyama, Hotaka; Godo, Hiromichi; Yamazaki, Shunpei, Logic circuit, light emitting device, semiconductor device, and electronic device.

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51. Im, James S., Method and system for facilitating bi-directional growth.

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52. Angermann, Wolfgang; Banisch, Andreas, Method for fabricating field-effect transistors in integrated semiconductor circuits and integrated semiconductor circuit fabricated with a field-effect transistor of this type including a dual gate.

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53. Brask, Justin K.; Chau, Robert S.; Datta, Suman; Doczy, Mark L.; Doyle, Brian S.; Kavalieros, Jack T.; Majumdar, Amlan; Metz, Matthew V.; Radosavljevic, Marko, Method for fabricating transistor with thinned channel.

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54. Brask, Justin K.; Chau, Robert S.; Datta, Suman; Doczy, Mark L.; Doyle, Brian S.; Kavalieros, Jack T.; Majumdar, Amlan; Metz, Matthew V.; Radosavljevic, Marko, Method for fabricating transistor with thinned channel.

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55. Brask, Justin K.; Chau, Robert S.; Datta, Suman; Doczy, Mark L.; Doyle, Brian S.; Kavalieros, Jack T.; Majumdar, Amlan; Metz, Matthew V.; Radosavljevic, Marko, Method for fabricating transistor with thinned channel.

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56. Buynoski, Matthew S.; An, Judy Xilin; Yu, Bin, Method for forming channels in a finfet device.

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57. Lin, Ming-Ren; Wang, Haihong; Yu, Bin, Method for forming structures in finfet devices.

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58. Ito, Shunichi; Hosoba, Miyuki, Method for manufacturing semiconductor device.

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59. Ito, Shunichi; Hosoba, Miyuki, Method for manufacturing semiconductor device.

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60. Ito, Shunichi; Hosoba, Miyuki; Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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61. Ito, Shunichi; Hosoba, Miyuki; Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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62. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Method for manufacturing semiconductor device.

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63. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Method for manufacturing semiconductor device.

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64. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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65. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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66. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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67. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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68. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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69. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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70. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga, Method for manufacturing semiconductor device.

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71. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga; Ito, Shunichi; Hosoba, Miyuki, Method for manufacturing thin film transistor using multi-tone mask.

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72. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga; Ito, Shunichi; Hosoba, Miyuki, Method for manufacturing thin film transistor using multi-tone mask.

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73. Im, James S., Method for providing a continuous motion sequential lateral solidification for reducing or eliminating artifacts in edge regions, and a mask for facilitating such artifact reduction/elimination.

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74. Dennison Charles H. ; Manning Monte, Method of fabricating a bottom and top gated thin film transistor having an electrical sidewall connection.

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75. Shah,Uday; Doyle,Brian S.; Brask,Justin K.; Chau,Robert S., Method of fabricating a multi-cornered film.

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76. Brask,Justin K.; Doyle,Brian S.; Kavalleros,Jack; Doczy,Mark; Shah,Uday; Chau,Robert S., Method of forming a metal oxide dielectric.

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77. Brask, Justin K.; Doyle, Brian S.; Kavalieros, Jack; Doczy, Mark; Shah, Uday; Chau, Robert S., Method of forming metal gate electrodes using sacrificial gate electrode material and sacrificial gate dielectric material.

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78. Doyle,Brian S.; Datta,Suman; Kavalieros,Jack T.; Majumdar,Amlan, Method of ion implanting for tri-gate devices.

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79. Koo, Jae Bon; You, In-Kyu; Ahn, Seongdeok; Cho, Kyoung Ik, Method of manufacturing thin film transistor and thin film transistor substrate.

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80. Koo, Jae Bon; You, In-Kyu; Ahn, Seongdeok; Cho, Kyoung Ik, Method of manufacturing thin film transistor and thin film transistor substrate.

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81. Brask, Justin K.; Doyle, Brian S.; Shah, Uday; Chau, Robert S., Method of patterning a film.

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82. Tanzawa, Toru, Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate.

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83. Tanzawa, Toru, Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate.

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84. Tanzawa, Toru, Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate.

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85. Brask, Justin K.; Kavalieros, Jack; Shah, Uday; Datta, Suman; Majumdar, Amlan; Chau, Robert S.; Doyle, Brian S., Methods for patterning a semiconductor film.

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86. Charles H. Dennison ; Monte Manning, Methods of forming integrated circuitry.

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87. Dennison Charles H. ; Manning Monte, Methods of forming integrated circuitry methods of forming thin film transistors, integrated circuitry and thin film transistors.

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88. Dennison, Charles H.; Manning, Monte, Methods of forming transistors.

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89. Dennison, Charles H.; Manning, Monte, Methods of forming transistors.

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90. Im, James S., Methods of producing high uniformity in thin film transistor devices fabricated on laterally crystallized thin films.

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91. Zhang,Yuegang; Doyle,Brian S.; Bourianoff,George I., Multi-gate carbon nano-tube transistors.

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92. Doyle, Brian S.; Datta, Suman; Jin, Been Yih; Chau, Robert, Non-planar MOS structure with a strained channel region.

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93. Doyle,Brian S.; Datta,Suman; Jin,Been Yih; Chau,Robert, Non-planar MOS structure with a strained channel region.

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94. Doyle,Brian S; Datta,Suman; Jin,Been Yih; Zelick,Nancy M; Chau,Robert, Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow.

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95. Hareland,Scott A.; Chau,Robert S.; Doyle,Brian S.; Datta,Suman; Jin,Been Yih, Nonplanar device with stress incorporation layer and method of fabrication.

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96. Shah, Uday; Doyle, Brian S.; Brask, Justin K.; Chau, Robert S.; Letson, Thomas A., Nonplanar device with thinned lower body portion and method of fabrication.

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97. Shah, Uday; Doyle, Brian S.; Brask, Justin K.; Chau, Robert S.; Letson, Thomas A., Nonplanar device with thinned lower body portion and method of fabrication.

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98. Shah, Uday; Doyle, Brian S.; Brask, Justin K.; Chau, Robert S.; Letson, Thomas A., Nonplanar device with thinned lower body portion and method of fabrication.

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99. Shah, Uday; Doyle, Brian S.; Brask, Justin K.; Chau, Robert S.; Letson, Thomas A., Nonplanar device with thinned lower body portion and method of fabrication.

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100. Shah, Uday; Doyle, Brian; Brask, Justin K.; Chau, Robert S.; Letson, Thomas A., Nonplanar device with thinned lower body portion and method of fabrication.

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101. Shah, Uday; Doyle, Brian; Brask, Justin K.; Chau, Robert S.; Letson, Thomas A., Nonplanar device with thinned lower body portion and method of fabrication.

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102. Shah, Uday; Doyle, Brian; Brask, Justin K.; Chau, Robert S.; Letson, Thomas A., Nonplanar device with thinned lower body portion and method of fabrication.

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103. Hareland, Scott A.; Chau, Robert S.; Doyle, Brian S.; Rios, Rafael; Linton, Tom; Datta, Suman, Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication.

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104. Hareland, Scott A.; Chau, Robert S.; Doyle, Brian S.; Rios, Rafael; Linton, Tom; Datta, Suman, Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication.

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105. Hareland,Scott A.; Chau,Robert S.; Doyle,Brian S.; Rios,Rafael; Linton,Tom; Datta,Suman, Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication.

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106. Brask, Justin K.; Dovle, Brian S.; Kavalleros, Jack; Doczy, Mark; Shah, Uday; Chau, Robert S., Nonplanar transistors with metal gate electrodes.

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107. Brask,Justin K.; Doyle,Brian S.; Doczy,Mark L.; Chau,Robert S., Nonplanar transistors with metal gate electrodes.

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108. Brask,Justin K.; Doyle,Brian S.; Doczy,Mark L.; Chau,Robert S., Nonplanar transistors with metal gate electrodes.

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109. Brask,Justin K.; Doyle,Brian S.; Kavalieros,Jack; Doczy,Mark; Shah,Uday; Chau,Robert S., Nonplanar transistors with metal gate electrodes.

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110. Suzawa, Hideomi; Sasagawa, Shinya; Muraoka, Taiga; Ito, Shunichi; Hosoba, Miyuki, Oxide semiconductor device formed by using multi-tone mask.

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111. Im, James S., Process and system for laser crystallization processing of film regions on a substrate to minimize edge areas, and structure of such film regions.

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112. Kavalieros, Jack T.; Brask, Justin K.; Doyle, Brian S.; Shah, Uday; Datta, Suman; Doczy, Mark L.; Metz, Matthew V.; Chau, Robert S., Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby.

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113. Kavalieros,Jack T.; Brask,Justin K.; Doyle,Brian S.; Shah,Uday; Datta,Suman; Doczy,Mark L.; Metz,Matthew V.; Chau,Robert S., Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby.

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114. Im, James S.; van der Wilt, Paul Christiaan, Processes and systems for laser crystallization processing of film regions on a substrate utilizing a line-type beam, and structures of such film regions.

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115. Im, James S.; van der Wilt, Paul Christiaan, Processes and systems for laser crystallization processing of film regions on a substrate utilizing a line-type beam, and structures of such film regions.

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116. Merkle, Ralph C., Public key distribution using an approximate linear function.

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117. Miyairi, Hidekazu; Osada, Takeshi; Akimoto, Kengo; Yamazaki, Shunpei, Semiconductor device.

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118. Miyairi, Hidekazu; Osada, Takeshi; Akimoto, Kengo; Yamazaki, Shunpei, Semiconductor device.

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119. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Semiconductor device.

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120. Zhang, Hongyong, Semiconductor device and electronic device.

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121. Zhang,Hongyong, Semiconductor device and electronic device.

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122. Yamazaki, Shunpei, Semiconductor device and fabrication method thereof.

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123. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof.

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124. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof.

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125. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof.

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126. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof.

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127. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof.

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128. Miyairi, Hidekazu; Osada, Takeshi; Akimoto, Kengo; Yamazaki, Shunpei, Semiconductor device and method for manufacturing the same.

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129. Miyairi, Hidekazu; Osada, Takeshi; Akimoto, Kengo; Yamazaki, Shunpei, Semiconductor device and method for manufacturing the same.

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130. Miyairi, Hidekazu; Osada, Takeshi; Akimoto, Kengo; Yamazaki, Shunpei, Semiconductor device and method for manufacturing the same.

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131. Tsunoda,Akira; Yamazaki,Shunpei; Koyama,Jun, Semiconductor device and method for manufacturing the same.

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132. Tsunoda,Akira; Yamazaki,Shunpei; Koyama,Jun, Semiconductor device and method for manufacturing the same.

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133. Yamazaki, Shunpei; Akimoto, Kengo, Semiconductor device and method for manufacturing the semiconductor device.

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134. Yamazaki, Shunpei; Akimoto, Kengo, Semiconductor device and method for manufacturing the semiconductor device.

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135. Yamazaki, Shunpei; Akimoto, Kengo, Semiconductor device and method for manufacturing the semiconductor device.

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136. Isobe, Atsuo; Yamazaki, Shunpei; Kokubo, Chiho; Tanaka, Koichiro; Shimomura, Akihisa; Arao, Tatsuya; Miyairi, Hidekazu, Semiconductor device and method of manufacturing the same.

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137. Isobe, Atsuo; Yamazaki, Shunpei; Kokubo, Chiho; Tanaka, Koichiro; Shimomura, Akihisa; Arao, Tatsuya; Miyairi, Hidekazu; Akiba, Mai, Semiconductor device and method of manufacturing the same.

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138. Yamazaki, Shunpei; Sakata, Junichiro; Miyake, Hiroyuki; Kuwabara, Hideaki; Uochi, Hideki, Semiconductor device comprising a pixel portion and a driver circuit.

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139. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Semiconductor device comprising an oxide semiconductor layer.

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140. Zhang,Hongyong, Semiconductor device having a conductive layer with a light shielding part.

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141. Yamazaki, Shunpei; Isobe, Atsuo; Miyairi, Hidekazu; Suzawa, Hideomi, Semiconductor device having insulating stripe patterns.

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142. Kokubo, Chiho; Shiga, Aiko; Yamazaki, Shunpei; Miyairi, Hidekazu; Dairiki, Koji; Tanaka, Koichiro, Semiconductor device having multichannel transistor.

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143. Ponomarev, Youri V, Semiconductor device having strip-shaped channel and method for manufacturing such a device.

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144. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Semiconductor device including oxide semiconductor layer.

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145. Brask, Justin K.; Kavalieros, Jack; Doyle, Brian S.; Shah, Uday; Datta, Suman; Majumdar, Amlan; Chau, Robert S., Semiconductor device structures and methods of forming semiconductor structures.

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146. Brask, Justin K.; Kavalieros, Jack; Doyle, Brian S.; Shah, Uday; Datta, Suman; Majumdar, Amlan; Chau, Robert S., Semiconductor device structures and methods of forming semiconductor structures.

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147. Brask, Justin K.; Kavalieros, Jack; Doyle, Brian S.; Shah, Uday; Datta, Suman; Majumdar, Amlan; Chau, Robert S., Semiconductor device structures and methods of forming semiconductor structures.

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148. Brask, Justin K.; Kavalieros, Jack; Doyle, Brian S.; Shah, Uday; Datta, Suman; Majumdar, Amlan; Chau, Robert S., Semiconductor device structures and methods of forming semiconductor structures.

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149. Isobe, Atsuo; Godo, Hiromichi, Semiconductor element, method for manufacturing the semiconductor element, and semiconductor device including the semiconductor element.

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150. Isobe, Atsuo; Godo, Hiromichi, Semiconductor element, method for manufacturing the semiconductor element, and semiconductor device including the semiconductor element.

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151. Hirose, Atsushi, Shift register circuit.

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152. Hirose, Atsushi, Shift register circuit.

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153. Im, James S.; Van Der Wilt, Paul C., Single scan irradiation for crystallization of thin films.

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154. Im, James S., Single-shot semiconductor processing system and method having various irradiation patterns.

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155. Im, James S., Single-shot semiconductor processing system and method having various irradiation patterns.

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156. Hudait, Mantu K.; Shaheen, Mohamad A.; Chow, Loren A.; Tolchinsky, Peter G.; Fastenau, Joel M.; Loubychev, Dmitri; Liu, Amy W. K., Stacking fault and twin blocking barrier for integrating III-V on Si.

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157. Rakshit, Titash; Giles, Martin; Pillarisetty, Ravi; Kavalieros, Jack T., Stress in trigate devices using complimentary gate fill materials.

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158. Rakshit, Titash; Giles, Martin; Pillarisetty, Ravi; Kavalieros, Jack T., Stress in trigate devices using complimentary gate fill materials.

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159. Rakshit, Titash; Giles, Martin; Pillarisetty, Ravi; Kavalieros, Jack T., Stress in trigate devices using complimentary gate fill materials.

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160. Rakshit, Titash; Giles, Martin; Pillarisetty, Ravi; Kavalieros, Jack T., Stress in trigate devices using complimentary gate fill materials.

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161. Rakshit, Titash; Giles, Martin; Pillarisetty, Ravi; Kavalieros, Jack T., Stress in trigate devices using complimentary gate fill materials.

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162. Im, James S.; van der Wilt, Paul C., Systems and methods for creating crystallographic-orientation controlled poly-silicon films.

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163. Wang,Haihong; Ahmed,Shibly S.; Lin,Ming Ren; Yu,Bin, Systems and methods for forming multiple fin structures using metal-induced-crystallization.

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164. Im, James S.; Deng, Yikang; Hu, Qiongying; Chung, Ui-Jin; Limanov, Alexander B., Systems and methods for non-periodic pulse partial melt film processing.

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165. Im, James S.; Chung, Ui-Jin; Limanov, Alexander B.; Van Der Wilt, Paul C., Systems and methods for non-periodic pulse sequential lateral soldification.

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166. Im, James S.; Chung, Ui-Jin; Limanov, Alexander B.; Van Der Wilt, Paul C., Systems and methods for non-periodic pulse sequential lateral solidification.

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167. Im, James S., Systems and methods for preparation of epitaxially textured thick films.

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168. Im, James S., Systems and methods for preparation of epitaxially textured thick films.

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169. Im, James S., Systems and methods for preparing epitaxially textured polycrystalline films.

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170. Im, James S., Systems and methods for processing a film, and thin films.

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171. Im, James S., Systems and methods for the crystallization of thin films.

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172. Miyamoto Shoichi,JPX, Thin film transistor having a branched gate and channel.

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173. Miyairi, Hidekazu; Osada, Takeshi; Yamazaki, Shunpei, Thin film transistor with two gate electrodes.

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174. Chau, Robert S.; Doyle, Brian S.; Kavalieros, Jack; Barlage, Douglas; Datta, Suman, Tri-gate devices and methods of fabrication.

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175. Chau, Robert S.; Doyle, Brian S.; Kavalieros, Jack; Barlage, Douglas; Datta, Suman; Hareland, Scott A., Tri-gate devices and methods of fabrication.

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176. Chau,Robert S.; Doyle,Brian S.; Kavalieros,Jack; Barlage,Douglas; Datta,Suman, Tri-gate devices and methods of fabrication.

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177. Chau,Robert S.; Doyle,Brian S.; Kavalieros,Jack; Barlage,Douglas; Datta,Suman, Tri-gate devices and methods of fabrication.

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178. Chau,Robert S.; Doyle,Brian S.; Kavalieros,Jack; Barlage,Douglas; Datta,Suman; Hareland,Scott A., Tri-gate devices and methods of fabrication.

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179. Hareland, Scott A.; Chau, Robert S.; Doyle, Brian S.; Datta, Suman; Jin, Been-Yih, Tri-gate transistor device with stress incorporation layer and method of fabrication.

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180. Hareland, Scott A.; Chau, Robert S.; Doyle, Brian S.; Datta, Suman; Jin, Been-Yih, Tri-gate transistor device with stress incorporation layer and method of fabrication.

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181. Chau,Robert; Datta,Suman; Doyle,Brian S; Jin,Been Yih, Tri-gate transistors and methods to fabricate same.

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182. Liao, Wen-Shiang; Shiau, Wei-Tsun, Triple gate device having strained-silicon channel.

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183. Im, James S.; Sposili, Robert S.; Crowder, Mark A., Uniform large-grained and gain boundary location manipulated polycrystalline thin film semiconductors formed using sequential lateral solidification and devices formed thereon.

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184. Im, James S.; Sposili, Robert S.; Crowder, Mark A., Uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors formed using sequential lateral solidification and devices formed thereon.

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185. Im, James S.; Sposili, Robert S.; Crowder, Mark A., Uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors formed using sequential lateral solidification and devices formed thereon.

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