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Ferroelectric memory cell arrangement having a split capacitor plate structure 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/78
  • H01L-021/70
  • H01L-027/00
출원번호 US-0934949 (1992-08-25)
발명자 / 주소
  • Brassington Michael P. (Sunnyvale CA) Papaliolios Andreas G. (Sunnyvale CA)
출원인 / 주소
  • National Semiconductor Corporation (Santa Clara CA 02)
인용정보 피인용 횟수 : 82  인용 특허 : 0

초록 ▼

A ferroelectric memory cell architecture in which a pair of cells is fabricated so as to share common elements, and wherein ferroelectric capacitors are fabricated overlying the associated select transistors, thereby achieving a small-area cell architecture. First level refractory metal interconnect

대표청구항 ▼

A ferroelectric memory, comprising: a pair of transistors formed in a semiconductor material, each said transistor having a drain region and sharing a common source region; a pair of first level metal interconnects formed in contact with each said drain region, and being isolated; an insulation form

이 특허를 인용한 특허 (82)

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