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Method for fabricating an integrated circuit module 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-003/34
출원번호 US-0087434 (1993-07-09)
발명자 / 주소
  • Fillion Raymond A. (Niskayuna NY) Wojnarowski Robert J. (Ballston Lake NY) Gdula Michael (Knox NY) Cole Herbert S. (Burnt Hills NY) Wildi Eric J. (Niskayuna NY) Daum Wolfgang (Schenectady NY)
출원인 / 주소
  • General Electric Company (Schenectady NY 02)
인용정보 피인용 횟수 : 739  인용 특허 : 0

초록

Substrate material is molded directly to semiconductor chips and other electrical components that are positioned for integrated circuit module fabrication. Chips having contact pads are placed face down on a layer of adhesive supported by a base. A mold form is positioned around the chips. Substrate

대표청구항

A method of fabricating an integrated circuit module substrate on a base, comprising the steps of: applying an insulative base sheet over said base, said base sheet comprising a polymer film having an adhesive coating situated on the side of the polymer film opposite said base; placing a plurality o

이 특허를 인용한 특허 (739)

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  186. Swaminathan, Rajasekaran; Mahajan, Ravindranath V., Magnetically sintered conductive via.
  187. Dunlap, Brett Arnold; Darveaux, Robert Francis, Mechanical tape separation package.
  188. Dunlap, Brett Arnold; Darveaux, Robert Francis, Mechanical tape separation package and method.
  189. Lee, Joon Ki; Ha, Woon Ky, Memory card.
  190. Wachter, Ulrich; Maier, Dominic; Kilger, Thomas, Metal redistribution layer for molded substrates.
  191. Elias, J. Michael; Cepas, Bruce M., Method and apparatus for absorbing thermal energy.
  192. Brewer,Peter D.; Hunter,Andrew T.; Deckard,Luisa M., Method for assembly of complementary-shaped receptacle site and device microstructures.
  193. Egitto Frank D. ; Gaynes Michael A. ; Kodnani Ramesh R. ; Matienzo Luis J. ; Pierson Mark V., Method for bonding heat sinks to overmolds and device formed thereby.
  194. Egitto, Frank D.; Gaynes, Michael A.; Kodnani, Ramesh R.; Matienzo, Luis J.; Pierson, Mark V., Method for bonding heat sinks to overmolds and device formed thereby.
  195. Egitto, Frank D.; Gaynes, Michael A.; Kodnani, Ramesh R.; Matienzo, Luis J.; Pierson, Mark V., Method for bonding heat sinks to overmolds and device formed thereby.
  196. Egitto, Frank D.; Gaynes, Michael A.; Kodnani, Ramesh R.; Matienzo, Luis J.; Pierson, Mark V., Method for bonding heat sinks to overmolds and device formed thereby.
  197. Saia Richard Joseph ; Durocher Kevin Matthew ; Cole Herbert Stanley, Method for fabricating a flexible interconnect film with resistor and capacitor layers.
  198. Towle, Steven; Sakamoto, Hajime; Wang, Dongdong, Method for fabricating a microelectronic device using wafer-level adhesion layer deposition.
  199. Beer, Gottfried; Escher-Poeppel, Irmgard, Method for fabricating a semiconductor and semiconductor package.
  200. Beer, Gottfried; Escher-Poeppel, Irmgard, Method for fabricating a semiconductor and semiconductor package.
  201. Beer, Gottfried; Escher-Poeppel, Irmgard, Method for fabricating a semiconductor and semiconductor package.
  202. Beer, Gottfried; Escher-Poeppel, Irmgard, Method for fabricating a semiconductor and semiconductor package.
  203. Beer, Gottfried; Escher-Poeppel, Irmgard, Method for fabricating a semiconductor device and semiconductor package.
  204. Wojnarowski Robert John ; Rose James Wilson ; Balch Ernest Wayne ; Douglas Leonard Richard ; Downey Evan Taylor ; Gdula Michael, Method for fabricating a thin film capacitor.
  205. Wojnarowski Robert John ; Rose James Wilson ; Balch Ernest Wayne ; Douglas Leonard Richard ; Downey Evan Taylor ; Gdula Michael, Method for fabricating a thin film inductor.
  206. Wojnarowski Robert John (Ballston Lake NY) Rose James Wilson (Guilderland NY) Balch Ernest Wayne (Ballston Spa NY) Douglas Leonard Richard (Burnt Hills NY) Downey Evan Taylor (Niskayuna NY) Gdula Mic, Method for fabricating a thin film resistor.
  207. Pogge H. Bernhard ; Davari Bijan ; Greschner Johann,DEX ; Kalter Howard L., Method for fabricating a very dense chip package.
  208. Lin,Mou Shiung; Lee,Jin Yuan; Huang,Ching Cheng, Method for fabricating chip package.
  209. Lee, Jin-Yuan; Lin, Mou-Shiung; Huang, Ching-Cheng, Method for fabricating chip package with die and substrate.
  210. Lee,Jin Yuan; Lin,Mou Shiung; Huang,Ching Cheng, Method for fabricating circuitry component.
  211. Chen, Yan-Heng; Chan, Mu-Hsuan; Chi, Chieh-Yuan, Method for fabricating package structure.
  212. Huang, Yongli, Method for fabrication an electrical transducer.
  213. Yee, Kuo-Chung; Wang, Meng-Jen, Method for making a stackable package.
  214. Cole ; Jr. Herbert Stanley ; Sitnik-Nieters Theresa Ann, Method for making an electronic module.
  215. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Method for manufacturing multilayer printed circuit board.
  216. Arinzeh, Treena; Collins, George; Lee, Yee-Shuan, Method for nerve growth and repair using a piezoelectric scaffold.
  217. Towle,Steven; Jones,Martha; Vu,Quat T., Method for packaging a microelectronic device using on-die bond pad expansion.
  218. Stecher, Thomas E., Method for planarizing bumped die.
  219. Huet, Stephanie; Ait-Mani, Abdenacer; Di Cioccio, Lea, Method for producing photosensitive infrared detectors.
  220. Krusor, Brent S.; Mei, Ping, Method for simultaneously bonding multiple chips of different heights on flexible substrates using anisotropic conductive film or paste.
  221. Hakey, Mark C.; Holmes, Steven J.; Horak, David V.; Linde, Harold G.; Sprogis, Edmund J., Method of assembling a plurality of semiconductor devices having different thickness.
  222. Eichelberger, Charles W.; Kohl, James E., Method of bonding two structures together with an adhesive line of controlled thickness.
  223. Gidon, Pierre; Philippe, Paul, Method of collectively packaging electronic components.
  224. Eichelberger, Charles W.; Kohl, James E., Method of fabricating a base layer circuit structure.
  225. Eichelberger, Charles W.; Kohl, James E., Method of fabricating a circuit structure.
  226. Beer, Gottfried; Escher-Poeppel, Irmgard, Method of fabricating a semiconductor device.
  227. Beer, Gottfried; Escher-Poeppel, Irmgard, Method of fabricating a semiconductor device with encapsulant.
  228. Lee, Jin-Yuan; Huang, Ching-Cheng; Lin, Mou-Shiung, Method of fabricating chip package.
  229. Pogge, H. Bernhard; Prasad, Chandrika; Yu, Roy, Method of fabricating integrated electronic chip with an interconnect device.
  230. Towle,Steven; Wermer,Paul H., Method of fabricating microelectronic package having a bumpless laminated interconnection layer.
  231. Teh, Weng Hong; Guzek, John S., Method of forming a microelectronic device package.
  232. Lytle, William H., Method of forming a package with exposed component surfaces.
  233. Dunlap, Brett Arnold, Method of forming a plurality of electronic component packages.
  234. Burch, Kenneth R.; Mangrum, Marc A.; Lytle, William H., Method of forming a semiconductor package including two devices.
  235. Iijima, Makoto; Nukiwa, Masaru; Ueno, Seiji; Morioka, Muneharu, Method of forming an insulative substrate having conductive filled vias.
  236. Lo, Wai Yew, Method of forming semiconductor package.
  237. Wojnarowski Robert John ; Rose James Wilson ; Paik Kyung Wook ; Gdula Michael, Method of forming thin film resistors on organic surfaces.
  238. Chi, HeeJo; Cho, NamJu; Shin, HanGil, Method of forming thin profile WLCSP with vertical interconnect over package footprint.
  239. Fjelstad, Joseph C., Method of making a circuit subassembly.
  240. Credelle, Thomas Lloyd; Gengel, Glenn; Stewart, Roger Green; Joseph, William Hill, Method of making a radio frequency identification (RFID) tag.
  241. Devoe, Alan; Devoe, Lambert; Trinh, Hung, Method of making an essentially monolithic capacitor.
  242. Devoe,Alan; Devoe,Lambert; Trinh,Hung, Method of making an essentially monolithic capacitor.
  243. Curtin Mark, Method of making board matched nested support fixture.
  244. Woychik, Charles Gerard; Fillion, Raymond Albert, Method of making demountable interconnect structure.
  245. Antesberger, Timothy; Egitto, Frank D.; Markovich, Voya R.; Wilson, William E., Method of making high density interposer and electronic package utilizing same.
  246. Chua,Swee Kwang; Low,Siu Waf; Chia,Yong Poo; Eng,Meow Koon; Neo,Yong Loo; Boon,Suan Jeung; Huang,Suangwu; Zhou,Wei, Method of making multichip wafer level packages and computing systems incorporating same.
  247. Devoe, Alan; Devoe, Lambert; Trinh, Hung, Method of making single layer capacitor.
  248. Lin, Charles W. C.; Wang, Chia-Chung, Method of making thermally enhanced semiconductor assembly with bump/base/flange heat spreader and build-up circuitry.
  249. Sakamoto, Hajime; Wang, Dongdong, Method of manufacturing a printed circuit board having an embedded electronic component.
  250. Hiner,David Jon; Huemoeller,Ronald Patrick; Rusli,Sukianto, Method of manufacturing a semiconductor package.
  251. Nuytkens,Peter R.; Popeko,Ilya E.; Kulinets,Joseph M., Method of manufacturing planar inductors.
  252. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Method of manufacturing printed wiring board.
  253. Weidner,Karl; Wolfgang,Eckhard; Zapf,J��rg, Method of manufacturing self-supporting contacting structures.
  254. Kunimoto, Yuji, Method of manufacturing semiconductor device.
  255. Lytle, William H.; Fay, Owen R.; Xu, Jianwen, Method of packaging an integrated circuit die.
  256. Wachter, Ulrich; Maier, Dominic; Kilger, Thomas, Method of packaging integrated circuits.
  257. Wachter, Ulrich; Maier, Dominic; Kilger, Thomas, Method of packaging integrated circuits and a molded package.
  258. Wachter, Ulrich; Maier, Dominic; Kilger, Thomas, Method of packaging integrated circuits and a molded substrate with non-functional placeholders embedded in a molding compound.
  259. Baleras, Francois; Souriau, Jean-Charles; Henry, David, Method of producing a via in a reconstituted substrate.
  260. Sunohara,Masahiro; Murayama,Kei; Higashi,Mitsutoshi, Method of production of multilayer circuit board with built-in semiconductor chip.
  261. Hunter, Andrew T.; Brewer, Peter D., Method of self-latching for adhesion during self-assembly of electronic or optical components.
  262. Arinzeh, Treena; Collins, George; Lee, Yee-Shuan, Method of tissue repair using a piezoelectric scaffold.
  263. Elliott, Kenneth R.; Brewer, Peter David; Royter, Yakov, Method of transistor level heterogeneous integration and system.
  264. Ma, Qing; Mu, Xiao-Chun; Vu, Quat T., Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby.
  265. Ma, Qing; Mu, Xiao-Chun; Vu, Quat T., Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby.
  266. Qing Ma ; Xiao-Chun Mu ; Quat T. Vu, Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby.
  267. Nicholls, Louis W.; St. Amand, Roger D.; Kim, Jin Seong; Jung, Woon Kab; Yang, Sung Jin; Darveaux, Robert F., Methods and structures for increasing the allowable die size in TMV packages.
  268. Cheng, Ming-Da; Chen, Hsien-Wei; Huang, Cheng-Lin; Chen, Meng-Tse; Liu, Chung-Shi, Methods for forming fan-out package structure.
  269. Credelle,Thomas Lloyd; Gengel,Glenn; Stewart,Roger Green; Joseph,William Hill, Methods for making electronic devices with small functional elements supported on a carriers.
  270. Nalla, Ravi K.; Manusharow, Mathew J.; Malatkar, Pramod, Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby.
  271. Nalla, Ravi K; Malatkar, Pramod; Manusharow, Mathew J, Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby.
  272. Credelle, Thomas Lloyd; Gengel, Glenn; Stewart, Roger Green; Joseph, William Hill, Methods of making a radio frequency identification (RFID) tags.
  273. Goh, Eng Huat; Teoh, Hoay Tien, Microelectric package utilizing multiple bumpless build-up structures and through-silicon vias.
  274. Saia, Richard Joseph; Durocher, Kevin Matthew; Kapusta, Christopher James; Nielsen, Matthew Christian, Microelectromechanical system device packaging method.
  275. Saia, Richard Joseph; Durocher, Kevin Matthew; Kapusta, Christopher James; Nielsen, Matthew Christian, Microelectromechanical system device packaging method.
  276. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure.
  277. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure and method of making same.
  278. Vu, Quat T.; Ton, Tuy T.; Towle, Steven, Microelectronic device having signal distribution functionality on an interfacial layer thereof.
  279. Towle, Steven; Wermer, Paul H., Microelectronic package having a bumpless laminated interconnection layer.
  280. Hu, Chuan, Microelectronic package having non-coplanar, encapsulated microelectronic devices and a bumpless build-up layer.
  281. Goh, Eng Huat; Teoh, Hoay Tien, Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias.
  282. Vincent, Michael B.; Hayes, Scott M., Microelectronic packages having embedded sidewall substrates and methods for the producing thereof.
  283. Vu, Quat T.; Li, Jian; Towle, Steven, Microelectronic substrate with integrated devices.
  284. Vu,Quat T.; Li,Jian; Towle,Steven, Microelectronic substrates with integrated devices.
  285. Crawford, Grant A.; Salama, Islam, Misalignment correction for embedded microelectronic die applications.
  286. Crawford, Grant A.; Salama, Islam, Misalignment correction for embedded microelectronic die applications.
  287. Kimura, Suzushi; Himori, Tsuyoshi; Hashimoto, Koji, Module component and method of manufacturing the same.
  288. Dreiza, Mahmoud; Ballantine, Andrew; Shumway, Russell Scott, Molded cavity substrate MEMS package fabrication method and structure.
  289. Lin,Chian Chi, Multi-chips bumpless assembly package and manufacturing method thereof.
  290. Souriau, Jean-Charles, Multi-component device integrated into a matrix.
  291. Lee, Baik-Woo; Lim, Ji-Hyuk; Booh, Seong-Woon, Multilayer laminate package and method of manufacturing the same.
  292. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Multilayer printed circuit board.
  293. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Multilayer printed circuit board.
  294. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Multilayer printed circuit board.
  295. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Multilayer printed circuit board.
  296. Sakamoto,Hajime; Sugiyama,Tadashi; Wang,Dongdong; Kariya,Takashi, Multilayer printed circuit board.
  297. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Multilayer printed circuit board and multilayer printed circuit board manufacturing method.
  298. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Multilayer printed circuit board and multilayer printed circuit board manufacturing method.
  299. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Multilayer printed wiring board and method for producing multilayer printed wiring board.
  300. Lee, Doo Hwan; Kang, Ho Shik; Shin, Yee Na; Chung, Yul Kyo; Lee, Seung Eun, Multilayered substrate and method of manufacturing the same.
  301. Rokugawa, Akio; Sasaki, Masayuki; Matsuda, Yuichi, Multilayered substrate for semiconductor device and method of manufacturing same.
  302. Fillion Raymond Albert ; Daum Wolfgang ; Kolc Ronald Frank ; Kuk Donald William ; Wojnarowski Rob Ert John, Multimodule interconnect structure and process.
  303. Saia, Richard Joseph; Gorczyca, Thomas Bert; Kapusta, Christopher James; Balch, Ernest Wayne; Claydon, Glenn Scott; Dasgupta, Samhita; Delgado, Eladio Clemente, Optoelectronic package and fabrication method.
  304. Brewer, Peter D., Oriented self-location of microstructures with alignment structures.
  305. Brewer,Peter D., Oriented self-location of microstructures with alignment structures.
  306. Lee, Wan-Yu; Tseng, Chun-Hao; Lai, Jui Hsieh; Huang, Tien-Yu; Kuo, Ying-Hao; Yee, Kuo-Chung, Package and method for integration of heterogeneous integrated circuits.
  307. Lee, Wan-Yu; Tseng, Chun-Hao; Lai, Jui Hsieh; Huang, Tien-Yu; Kuo, Ying-Hao; Yee, Kuo-Chung, Package and method for integration of heterogeneous integrated circuits.
  308. Su, Yuan-Chang; Huang, Shih-Fu; Chen, Chia-Cheng, Package carrier, semiconductor package, and process for fabricating same.
  309. Do, Byung Tai; Kuan, Heap Hoe; Chow, Seng Guan, Package-in-package using through-hole via die on saw streets.
  310. Do, Byung Tai; Kuan, Heap Hoe; Chow, Seng Guan, Package-on-package using through-hole via die on saw streets.
  311. Eichelberger, Charles W.; Kohl, James E., Packaged electronic modules and fabrication methods thereof implementing a cell phone or other electronic system.
  312. Huang, Yongli, Packaging and connecting electrostatic transducer arrays.
  313. Arinzeh, Treena; Collins, George; Lee, Yee-Shuan, Piezoelectric scaffold for nerve growth and repair.
  314. Durocher, Kevin Matthew; Balch, Ernest Wayne; Krishnamurthy, Vikram B.; Saia, Richard Joseph; Cole, Herbert Stanley; Kolc, Ronald Frank, Plastic packaging of LED arrays.
  315. Durocher, Kevin Matthew; Balch, Ernest Wayne; Krishnamurthy, Vikram B.; Saia, Richard Joseph; Cole, Herbert Stanley; Kolc, Ronald Frank, Plastic packaging of LED arrays.
  316. Durocher, Kevin Matthew; Balch, Ernest Wayne; Krishnamurthy, Vikram B.; Saia, Richard Joseph; Cole, Herbert Stanley; Kolc, Ronald Frank, Plastic packaging of LED arrays.
  317. Burhan Ozmat ; Mustansir Hussainy Kheraluwala ; Eladio Clemente Delgado ; Charles Steven Korman ; Paul Alan McConnelee, Power electronic module packaging.
  318. Ozmat Burhan ; Kheraluwala Mustansir Hussainy ; Delgado Eladio Clemente ; Korman Charles Steven ; McConnelee Paul Alan, Power electronic module packaging.
  319. Zeng, Jian-Hong; Hong, Shou-Yu; Ye, Qi-Feng; Lin, Yi-Cheng, Power module.
  320. Fillion Raymond Albert ; Whitmore Barry Scott ; Korman Charles Steven ; Esser Albert Andreas Maria, Power overlay chip scale packages for discrete power devices.
  321. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  322. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  323. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  324. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  325. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  326. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  327. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  328. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  329. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  330. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  331. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  332. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board.
  333. Inagaki,Yasushi; Asai,Motoo; Wang,Dongdong; Yabashi,Hideo; Shirai,Seiji, Printed circuit board and method for manufacturing printed circuit board.
  334. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board and method of manufacturing printed circuit board.
  335. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printed circuit board and method of manufacturing printed circuit board.
  336. Sakamoto, Hajime; Sugiyama, Tadashi; Wang, Dongdong; Kariya, Takashi, Printed circuit board manufacturing method.
  337. Inagaki, Yasushi; Asai, Motoo; Wang, Dongdong; Yabashi, Hideo; Shirai, Seiji, Printing wiring board and method of producing the same and capacitor to be contained in printed wiring board.
  338. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Probe card assembly and kit, and methods of making same.
  339. Brewer,Peter D.; Case,Michael G.; Hunter,Andrew T.; Matloubian,Mehran; Roth,John A.; Pobanz,Carl W., Process for assembling three-dimensional systems on a chip and structure thus obtained.
  340. Seo Seong Min,KRX ; Song Jae Hwan,KRX, Process for bonding semiconductor chip.
  341. Mu,Chun; Ma,Qing; Vu,Quat; Towle,Steven, Process for forming a direct build-up layer on an encapsulated die packages utilizing intermediate structures.
  342. Ma, Qing; Mu, Xiao-Chun; Vu, Quat; Towle, Steve, Process for forming microelectronic packages and intermediate structures formed therewith.
  343. H. Bernhard Pogge ; Chandrika Prasad ; Roy Yu, Process for making fine pitch connections between devices and structure made by the process.
  344. Pogge, H. Bernhard; Prasad, Chandrika; Yu, Roy, Process for making fine pitch connections between devices and structure made by the process.
  345. Pogge,H. Bernhard; Prasad,Chandrika; Yu,Roy, Process for making fine pitch connections between devices and structure made by the process.
  346. Pogge H. Bernhard ; Iyer Subramania S., Process for precise multichip integration and product thereof.
  347. Pogge H. Bernhard, Process for precision alignment of chips for mounting on a substrate.
  348. Brewer,Peter D.; Pobanz,Carl W., Process for producing high performance interconnects.
  349. Steven Towle ; Paul Koning, Protective film for the fabrication of direct build-up layers on an encapsulated die package.
  350. Hadley, Mark A.; Carrender, Curt L.; Smith, John Stephen, RFID strap capacitively coupled and method of making same.
  351. Gengel, Glenn W.; Hadley, Mark A.; Pounds, Tom; Schatz, Kenneth D.; Drzaic, Paul S., RFID tags and processes for producing RFID tags.
  352. Gengel, Glenn W.; Hadley, Mark A.; Pounds, Tom; Schatz, Kenneth D.; Drzaic, Paul S., RFID tags and processes for producing RFID tags.
  353. Gengel, Glenn W.; Hadley, Mark A.; Pounds, Tom; Schatz, Kenneth D.; Drzaic, Paul S., RFID tags and processes for producing RFID tags.
  354. Gengel, Glenn W.; Hadley, Mark A.; Pounds, Torn; Schatz, Kenneth D.; Drzaic, Paul S., RFID tags and processes for producing RFID tags.
  355. Gengel,Glenn W.; Hadley,Mark A.; Pounds,Tom; Schatz,Kenneth D.; Drzaic,Paul S., RFID tags and processes for producing RFID tags.
  356. Gengel,Glenn W.; Hadley,Mark A.; Pounds,Tom; Schatz,Kenneth D.; Drzaic,Paul S., RFID tags and processes for producing RFID tags.
  357. Carrender, Curt, Radio frequency identification (RFID) tag for an item having a conductive layer included or attached.
  358. Carrender, Curt, Radio frequency identification (RFID) tag for an item having a conductive layer included or attached.
  359. Carrender, Curt, Radio frequency identification (RFID) tag for an item having a conductive layer included or attached.
  360. Uchida,Yasufumi; Saeki,Yoshihiro, Rearrangement sheet, semiconductor device and method of manufacturing thereof.
  361. Guzek, John, Recessed and embedded die coreless package.
  362. Guzek, John, Recessed and embedded die coreless package.
  363. Guzek, John, Recessed and embedded die coreless package.
  364. Guzek, John, Recessed and embedded die coreless package.
  365. Magnus, Alan J., Redistributed chip packages containing multiple components and methods for the fabrication thereof.
  366. Bayerer, Reinhold, Reliable area joints for power semiconductors.
  367. Haba, Belgacem; Oganesian, Vage; Endo, Kimitaka, Robust multi-layer wiring elements and assemblies with embedded microelectronic elements.
  368. Teh, Weng Hong; Guzek, John S., Secondary device integration into coreless microelectronic device packages.
  369. Daghighian Henry M. ; Cina Michael F., Semi-transparent monitor detector for surface emitting light emitting devices.
  370. Leu,Chuen Rong; Lin,Charles W. C., Semiconductor chip assembly with embedded metal pillar.
  371. Leu,Chuen Rong; Lin,Charles W. C., Semiconductor chip assembly with embedded metal pillar.
  372. Meyer, Thorsten; Brunnbauer, Markus; Pohl, Jens, Semiconductor chip package, semiconductor chip assembly, and method for fabricating a device.
  373. Beer, Gottfried; Hoegerl, Juergen; Stolze, Thilo, Semiconductor component with moisture barrier for sealing semiconductor body.
  374. Kim, Do Hyung; Kang, Dae Byoung; Han, Seung Chul, Semiconductor device.
  375. Miura, Hideo; Kohno, Ryuji, Semiconductor device and contractor for inspection.
  376. Akiyama, Hajime; Okada, Akira; Yamashita, Kinya, Semiconductor device and electrical contact structure thereof.
  377. Kim, Jin Seong; Park, Dong Joo; Kim, Kwang Ho; Ahn, Ye Sul, Semiconductor device and fabricating method thereof.
  378. Kim, Sang Won; Jung, Boo Yang; Kim, Sung Kyu; Yoo, Min; Lee, Seung Jae, Semiconductor device and fabricating method thereof.
  379. Akagawa, Masatoshi, Semiconductor device and manufacturing method therefor.
  380. Akagawa,Masatoshi, Semiconductor device and manufacturing method therefor.
  381. Clark, David; Zwenger, Curtis, Semiconductor device and manufacturing method thereof.
  382. Do, Won Chul; Jung, Yeon Seung; Ko, Yong Jae, Semiconductor device and manufacturing method thereof.
  383. Marutani, Hisakazu; Iwami, Yasunari; Chikai, Tomoshige; Takahashi, Tomoko; Yamagata, Osamu; Mitsugi, Shingo; Chen, Chunghao, Semiconductor device and manufacturing method thereof.
  384. Paek, Jong Sik; Do, Won Chul; Park, Doo Hyun; Park, Eun Ho; Oh, Sung Jae, Semiconductor device and manufacturing method thereof.
  385. Paek, Jong Sik; Do, Won Chul; Park, Doo Hyun; Park, Eun Ho; Oh, Sung Jae, Semiconductor device and manufacturing method thereof.
  386. Ryu, Ji Yeon; Kim, Byong Jin; Shim, Jae Beum, Semiconductor device and manufacturing method thereof.
  387. Scanlan, Christopher M.; Bishop, Craig, Semiconductor device and method comprising redistribution layers.
  388. Yoon, Seung Wook; Caparas, Jose A.; Lin, Yaojian; Marimuthu, Pandi C.; Chen, Kang; Bao, Xusheng; Fang, Jianmin, Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLP-MLP).
  389. Horiuchi Michio (Nagano JPX) Harayama Yoichi (Nagano JPX), Semiconductor device and method for manufacturing same.
  390. Pagaila, Reza A., Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structure.
  391. Pagaila, Reza A., Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structure.
  392. Pagaila, Reza A., Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structure.
  393. Pagaila, Reza A., Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structure.
  394. Pagaila, Reza A., Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structures.
  395. Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo, Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation.
  396. Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo, Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation.
  397. Pagaila, Reza A.; Lin, Yaojian; Koo, JunMo, Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation.
  398. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation.
  399. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation.
  400. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation.
  401. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation.
  402. Do, Byung Tai; Pagaila, Reza A., Semiconductor device and method of forming B-stage conductive polymer over contact pads of semiconductor die in Fo-WLCSP.
  403. Do, Byung Tai; Pagaila, Reza A., Semiconductor device and method of forming B-stage conductive polymer over contact pads of semiconductor die in Fo-WLCSP.
  404. Pagaila, Reza A.; Carson, Flynn; Yoon, Seung Uk, Semiconductor device and method of forming EMI shielding layer with conductive material around semiconductor die.
  405. Oh, JiHoon; Lee, SinJae; Kim, JinGwan, Semiconductor device and method of forming Fo-WLCSP having conductive layers and conductive vias separated by polymer layers.
  406. Oh, JiHoon; Lee, SinJae; Kim, JinGwan, Semiconductor device and method of forming Fo-WLCSP having conductive layers and conductive vias separated by polymer layers.
  407. Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo, Semiconductor device and method of forming Fo-WLCSP with discrete semiconductor components mounted under and over semiconductor die.
  408. Lin, Yaojian; Frye, Robert C.; Marimuthu, Pandi Chelvam; Liu, Kai, Semiconductor device and method of forming IPD in fan-out level chip scale package.
  409. Lin, Yaojian; Frye, Robert C.; Marimuthu, Pandi Chelvam; Liu, Kai, Semiconductor device and method of forming IPD in fan-out wafer level chip scale package.
  410. Lin, Yaojian, Semiconductor device and method of forming IPD on molded substrate.
  411. Pagaila, Reza A.; Lin, Yaojian; Yoon, Seung Uk, Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier.
  412. Pagaila, Reza A.; Lin, Yaojian; Yoon, Seung Wook, Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier.
  413. Pagaila, Reza A.; Lin, Yaojian; Yoon, Seung Uk, Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die.
  414. Pagaila, Reza A.; Lin, Yaojian; Yoon, Seung Uk, Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die.
  415. Pagaila, Reza A.; Lin, Yaojian, Semiconductor device and method of forming WLCSP using wafer sections containing multiple die.
  416. Lin, Yaojian; Fang, Jianmin; Chen, Kang; Cao, Haijing, Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component.
  417. Lin, Yaojian; Fang, Jianmin; Chen, Kang; Cao, Haijing, Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component.
  418. Pagaila, Reza A.; Do, Byung Tai; Suthiwongsunthorn, Nathapong, Semiconductor device and method of forming a shielding layer between stacked semiconductor die.
  419. Pagaila, Reza A.; Do, Byung Tai; Suthiwongsunthorn, Nathapong, Semiconductor device and method of forming a shielding layer between stacked semiconductor die.
  420. Pagaila, Reza A.; Do, Byung Tai; Suthiwongsunthorn, Nathapong, Semiconductor device and method of forming a shielding layer between stacked semiconductor die.
  421. Pagaila, Reza A.; Huang, Rui; Lin, Yaojian, Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure.
  422. Pagaila, Reza A.; Huang, Rui; Lin, Yaojian, Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure.
  423. Lin, Yaojian; Bao, Xusheng; Chen, Kang; Fang, Jianmin, Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP.
  424. Lin, Yaojian; Chen, Kang, Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP.
  425. Lin, Yaojian; Chen, Kang, Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP.
  426. Lin, Yaojian; Chen, Kang; Yoon, Seung Wook, Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP.
  427. Lin, Yaojian; Chen, Kang; Yoon, Seung Wook, Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP.
  428. Camacho, Zigmund R.; Tay, Lionel Chien Hui; Bathan, Henry D.; Merilo, Dioscoro A.; Punzalan, Jeffrey D., Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection.
  429. Camacho, Zigmund R.; Tay, Lionel Chien Hui; Bathan, Henry D.; Punzalan, Jeffrey D.; Merilo, Dioscoro A., Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection.
  430. Pagaila, Reza A.; Lin, Yaojian, Semiconductor device and method of forming adhesive material to secure semiconductor die to carrier in WLCSP.
  431. Pagaila, Reza A.; Lin, Yaojian, Semiconductor device and method of forming adhesive material to secure semiconductor die to carrier in WLCSP.
  432. Pagaila, Reza A., Semiconductor device and method of forming air gap adjacent to stress sensitive region of the die.
  433. Pagaila, Reza A., Semiconductor device and method of forming air gap adjacent to stress sensitive region of the die.
  434. Lin, Yaojian; Fang, Jianmin; Chen, Kang; Cao, Haijing, Semiconductor device and method of forming an IPD over a high-resistivity encapsulant separated from other IPDS and baseband circuit.
  435. Lin, Yaojian; Fang, Jianmin; Chen, Kang; Cao, Haijing, Semiconductor device and method of forming an IPD over a high-resistivity encapsulant separated from other IPDS and baseband circuit.
  436. Lin, Yaojian, Semiconductor device and method of forming an inductor on polymer matrix composite substrate.
  437. Lin, Yaojian, Semiconductor device and method of forming an inductor on polymer matrix composite substrate.
  438. Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo, Semiconductor device and method of forming anisotropic conductive film between semiconductor die and build-up interconnect structure.
  439. Pagaila, Reza A.; Pendse, Rajendra D.; Koo, Jun Mo, Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in FO-WLCSP.
  440. Pagaila, Reza A.; Pendse, Rajendra D.; Koo, Jun Mo, Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in Fo-WLCSP.
  441. Lin, Yaojian, Semiconductor device and method of forming cavity in PCB containing encapsulant or dummy die having CTE similar to CTE of large array WLCSP.
  442. Pagaila, Reza A., Semiconductor device and method of forming cavity in build-up interconnect structure for short signal path between die.
  443. Pagaila, Reza A., Semiconductor device and method of forming cavity in build-up interconnect structure for short signal path between die.
  444. Pagaila, Reza Argenty, Semiconductor device and method of forming channels in back surface of FO-WLCSP for heat dissipation.
  445. Lin, Yaojian; Shim, Il Kwon; Chow, Seng Guan, Semiconductor device and method of forming compliant stress relief buffer around large array WLCSP.
  446. Lin, Yaojian; Shim, Il Kwon; Chow, Seng Guan, Semiconductor device and method of forming compliant stress relief buffer around large array WLCSP.
  447. Lin, Yaojian; Shim, Il Kwon; Chow, Seng Guan, Semiconductor device and method of forming compliant stress relief buffer around large array WLCSP.
  448. Chi, HeeJo; Cho, Namju; Shin, HanGil, Semiconductor device and method of forming conductive layer over metal substrate for electrical interconnect of semiconductor die.
  449. Chi, HeeJo; Cho, NamJu; Shin, HanGil, Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframe.
  450. Chi, HeeJo; Cho, NamJu; Shin, HanGil, Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframe.
  451. Chow, Seng Guan; Shim, Il Kwon; Kuan, Heap Hoe; Huang, Rui, Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulant.
  452. Chow, Seng Guan; Shim, Il Kwon; Kuan, Heap Hoe; Huang, Rui, Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulant.
  453. Lin, Yaojian; Marimuthu, Pandi C., Semiconductor device and method of forming conductive vias through interconnect structures and encapsulant of WLCSP.
  454. Lin, Yaojian; Marimuthu, Pandi Chelvam, Semiconductor device and method of forming conductive vias through interconnect structures and encapsulant of WLCSP.
  455. Pagaila, Reza A., Semiconductor device and method of forming dam material around periphery of die to reduce warpage.
  456. Pagaila, Reza A., Semiconductor device and method of forming dam material around periphery of die to reduce warpage.
  457. Pagaila, Reza A.; Caparas, Jose A.; Marimuthu, Pandi C., Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die.
  458. Pagaila, Reza A.; Caparas, Jose A.; Marimuthu, Pandi C., Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die.
  459. Pagaila, Reza A.; Caparas, Jose A.; Marimuthu, Pandi C., Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die.
  460. Pagaila, Reza A., Semiconductor device and method of forming dual-active sided semiconductor die in fan-out wafer level chip scale package.
  461. Lin, Yaojian; Fang, Jianmin; Chen, Kang; Cao, Haijing, Semiconductor device and method of forming high-frequency circuit structure and method thereof.
  462. Lin, Yaojian; Fang, Jianmin; Chen, Kang; Cao, Haijing, Semiconductor device and method of forming high-frequency circuit structure and method thereof.
  463. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia; Bao, Xusheng, Semiconductor device and method of forming insulating layer around semiconductor die.
  464. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia; Bao, Xusheng, Semiconductor device and method of forming insulating layer around semiconductor die.
  465. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia; Bao, Xusheng, Semiconductor device and method of forming insulating layer around semiconductor die.
  466. Lin, Yaojian; Marimuthu, Pandi C.; Chen, Kang; Goh, Hin Hwa; Gu, Yu; Shim, Il Kwon; Huang, Rui; Chow, Seng Guan; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief.
  467. Lin, Yaojian; Marimuthu, Pandi C.; Chen, Kang; Goh, Hin Hwa; Gu, Yu; Shim, Il Kwon; Huang, Rui; Chow, Seng Guan; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief.
  468. Lin, Yaojian; Marimuthu, Pandi C.; Chen, Kang; Goh, Hin Hwa; Gu, Yu; Shim, Il Kwon; Huang, Rui; Chow, Seng Guan; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief.
  469. Lin, Yaojian, Semiconductor device and method of forming integrated passive device.
  470. Lin, Yaojian, Semiconductor device and method of forming integrated passive device.
  471. Lin, Yaojian; Cao, Haijing; Zhang, Qing; Chen, Kang; Fang, Jianmin, Semiconductor device and method of forming integrated passive device module.
  472. Chua, Linda Pei Ee; Do, Byung Tai; Pagaila, Reza A., Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant.
  473. Chua, Linda Pei Ee; Do, Byung Tai; Pagaila, Reza A., Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant.
  474. Chua, Linda Pei Ee; Do, Byung Tai; Pagaila, Reza A., Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant.
  475. Shim, II Kwon; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer.
  476. Shim, Il Kwon; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer.
  477. Shim, Il Kwon; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer.
  478. Shim, Il Kwon; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer.
  479. Shim, Il Kwon; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer.
  480. Shim, Il Kwon; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer.
  481. Cho, NamJu; Chi, HeeJo; Shin, HanGil, Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die.
  482. Cho, NamJu; Chi, HeeJo; Shin, HanGil, Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die.
  483. Cho, NamJu; Chi, HeeJo; Shin, HanGil, Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die.
  484. Pagaila, Reza A.; Chow, Seng Guan; Yoon, Seung Uk, Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect.
  485. Pagaila, Reza A.; Chow, Seng Guan; Yoon, Seung Uk, Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect.
  486. Pagaila, Reza A.; Chow, Seng Guan; Yoon, Seung Uk; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect.
  487. Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo; Chi, HeeJo, Semiconductor device and method of forming interposer with opening to contain semiconductor die.
  488. Huang, Rui; Kuan, Heap Hoe; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming no-flow underfill material around vertical interconnect structure.
  489. Huang, Rui; Kuan, Heap Hoe; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming no-flow underfill material around vertical interconnect structure.
  490. Chi, HeeJo; Cho, NamJu; Shin, HanGil, Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP.
  491. Chi, HeeJo; Cho, NamJu; Shin, HanGil, Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP.
  492. Shin, HanGil; Chi, HeeJo; Cho, NamJu, Semiconductor device and method of forming pre-molded semiconductor die having bumps embedded in encapsulant.
  493. Pagaila, Reza A.; Lin, Yaojian, Semiconductor device and method of forming prefabricated EMI shielding frame with cavities containing penetrable material over semiconductor die.
  494. Pagaila, Reza A.; Lin, Yaojian, Semiconductor device and method of forming prefabricated EMI shielding frame with cavities containing penetrable material over semiconductor die.
  495. Pagaila, Reza A.; Lin, Yaojian, Semiconductor device and method of forming prefabricated EMI shielding frame with cavities containing penetrable material over semiconductor die.
  496. Dahilig, Frederick R.; Camacho, Zigmund R.; Tay, Lionel Chien Hui; Merilo, Dioscoro A., Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die.
  497. Dahilig, Frederick R.; Camacho, Zigmund R.; Tay, Lionel Chien Hui; Merilo, Dioscoro A., Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die.
  498. Dahilig, Frederick R.; Camacho, Zigmund R.; Tay, Lionel Chien Hui; Merilo, Dioscoro A., Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die.
  499. Chi, HeeJo; Park, YeongIm; Lee, HyungMin, Semiconductor device and method of forming prefabricated multi-die leadframe for electrical interconnect of stacked semiconductor die.
  500. Chi, HeeJo; Park, YeongIm; Lee, HyungMin, Semiconductor device and method of forming prefabricated multi-die leadframe for electrical interconnect of stacked semiconductor die.
  501. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming repassivation layer for robust low cost fan-out semiconductor package.
  502. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming repassivation layer for robust low cost fan-out semiconductor package.
  503. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die.
  504. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die.
  505. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die.
  506. Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo, Semiconductor device and method of forming sacrificial adhesive over contact pads of semiconductor die.
  507. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation.
  508. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation.
  509. Lin, Yaojian; Chen, Kang; Fang, Jianmin; Feng, Xia, Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation.
  510. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die.
  511. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die.
  512. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die.
  513. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die.
  514. Shim, Il Kwon; Chow, Seng Guan; Lin, Yaojian, Semiconductor device and method of forming stress relief layer between die and interconnect structure.
  515. Shim, Il Kwon; Chow, Seng Guan; Yaojian, Yaojian, Semiconductor device and method of forming stress relief layer between die and interconnect structure.
  516. Lin, Yaojian; Marimuthu, Pandi C.; Shim, Il Kwon, Semiconductor device and method of forming thermal lid for balancing warpage and thermal management.
  517. Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo, Semiconductor device and method of forming thermally conductive layer between semiconductor die and build-up interconnect structure.
  518. Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo, Semiconductor device and method of forming thermally conductive layer between semiconductor die and build-up interconnect structure.
  519. Huang, Rui; Kuan, Heap Hoe; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors.
  520. Huang, Rui; Kuan, Heap Hoe; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors.
  521. Huang, Rui; Kuan, Heap Hoe; Lin, Yaojian; Chow, Seng Guan, Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors.
  522. Kim, Sun Mi; Kim, OhHan; Lee, KyungHoon, Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with TSV.
  523. Kim, Sun Mi; Kim, OhHan; Lee, KyungHoon, Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with TSV.
  524. Chi, HeeJo; Cho, NamJu; Myung, JunWoo, Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSP.
  525. Camacho, Zigmund R.; Merilo, Dioscoro A.; Pisigan, Jairus L.; Dahilig, Frederick R., Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layers.
  526. Camacho, Zigmund R.; Merilo, Dioscoro A.; Pisigan, Jairus L.; Dahilig, Frederick R., Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layers.
  527. Lin, Yaojian; Fang, Jianmin; Chen, Kang; Cao, Haijing, Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound.
  528. Lin, Yaojian; Fang, Jianmin; Chen, Kang; Cao, Haijing, Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound.
  529. Lin, Yaojian; Chen, Kang, Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP.
  530. Lin, Yaojian; Chen, Kang, Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP.
  531. Chi, HeeJo; Shin, HanGil; Cho, NamJu, Semiconductor device and method of making an embedded wafer level ball grid array (EWLB) package on package (POP) device with a slotted metal carrier interposer.
  532. Lin, Yaojian; Cao, Haijing; Zhang, Qing; Chen, Kang; Fang, Jianmin, Semiconductor device and method of making integrated passive devices.
  533. Pagaila, Reza A.; Do, Byung Tai; Merilo, Dioscoro A., Semiconductor device and method of mounting pre-fabricated shielding frame over semiconductor die.
  534. Oh, JiHoon; Lee, SinJae; Kim, JinGwan, Semiconductor device and method of mounting semiconductor die to heat spreader on temporary carrier and forming polymer layer and conductive layer over the die.
  535. Oh, JiHoon; Lee, SinJae; Kim, JinGwan, Semiconductor device and method of mounting semiconductor die to heat spreader on temporary carrier and forming polymer layer and conductive layer over the die.
  536. Oh, JiHoon; Lee, SinJae; Kim, JinGwan, Semiconductor device and method of mounting semiconductor die to heat spreader on temporary carrier and forming polymer layer and conductive layer over the die.
  537. Pagaila, Reza A.; Do, Byung Tai; Huang, Shuangwu, Semiconductor device and method of providing Z-interconnect conductive pillars with inner polymer core.
  538. Pagaila, Reza A.; Do, Byung Tai; Huang, Shuangwu, Semiconductor device and method of providing z-interconnect conductive pillars with inner polymer core.
  539. Pagaila, Reza A.; Do, Byung Tai; Huang, Shuangwu, Semiconductor device and method of providing z-interconnect conductive pillars with inner polymer core.
  540. Pagaila, Reza A.; Do, Byung Tai; Chua, Linda Pei Ee, Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars.
  541. Lin, Yaojian, Semiconductor device and method of wafer level package integration.
  542. Koseki Osamu (Chiba JPX) Ishii Takichi (Chiba JPX) Mandai Masaaki (Chiba JPX) Yoshino Tomoyuki (Chiba JPX) Takeuchi Hitoshi (Chiba JPX), Semiconductor device and process for fabricating the same.
  543. Horiuchi, Michio; Kurihara, Takashi; Nagaoka, Tomio; Aoki, Masao; Mizuno, Shigeru, Semiconductor device and process of production of same.
  544. Do, Won Chul; Ko, Yong Jae, Semiconductor device comprising a conductive pad on a protruding-through electrode.
  545. Lin, Yaojian, Semiconductor device having IPD structure with smooth conductive layer and bottom-side conductive layer.
  546. Kobayashi, Thomas S.; Sheck, Stephen G.; Pozder, Scott K., Semiconductor device having a fuse and method of forming thereof.
  547. Pagaila, Reza A.; Do, Byung Tai; Huang, Shuangwu; Pendse, Rajendra D., Semiconductor device having a vertical interconnect structure using stud bumps.
  548. Pagaila, Reza A.; Do, Byung Tai; Lin, Yaojian; Huang, Rui, Semiconductor device having electrical devices mounted to IPD structure and method for shielding electromagnetic interference.
  549. Pagaila, Reza A.; Do, Byung Tai; Lin, Yaojian; Huang, Rui, Semiconductor device having electrical devices mounted to IPD structure and method of shielding electromagnetic interference.
  550. Lin, Yaojian; Cao, Haijing; Chen, Kang; Fang, Jianmin, Semiconductor device having embedded integrated passive devices electrically interconnected using conductive pillars.
  551. Kim, Jin Seong; Park, Dong Joo; Kim, Kwang Ho; Yoo, Hee Yeoul; Jeong, Jeong Wung, Semiconductor device having overlapped via apertures.
  552. Kim, Jin Seong; Park, Dong Joo; Kim, Kwang Ho; Yoo, Hee Yeoul; Jeong, Jeong Wung, Semiconductor device having overlapped via apertures.
  553. Kim, Jin Seong; Park, Dong Joo; Kim, Kwang Ho; Yoo, Hee Yeoul; Jeong, Jeong Wung, Semiconductor device having overlapped via apertures.
  554. Cheng, Hung-Hsiang; Lin, Tzu-Chih; Hung, Chang-Ying; Wu, Chih-Wei, Semiconductor device having shielded conductive vias.
  555. Do, Won Chul; Jung, Yeon Seung; Ko, Yong Jae, Semiconductor device having through electrodes protruding from dielectric layer.
  556. Jobetto, Hiroyasu, Semiconductor device having wiring line and manufacturing method thereof.
  557. Jobetto, Hiroyasu, Semiconductor device having wiring line and manufacturing method thereof.
  558. Meyer, Thorsten; Pohl, Jens, Semiconductor device including at least one element.
  559. Pagaila, Reza A.; Do, Byung Tai; Merilo, Dioscoro A., Semiconductor device including pre-fabricated shielding frame disposed over semiconductor die.
  560. Magnus, Alan J.; Acosta, Carl E. D.; Mitchell, Douglas G.; Poarch, Justin E., Semiconductor device package having backside contact and method for manufacturing.
  561. Hsieh, Chuehan; Yang, Hung-Jen; Huang, Min-Lung, Semiconductor device package with an alignment mark.
  562. Liao, Kuo-Hsien; Chan, Chi-Hong; Chen, Jian-Cheng; Ueng, Chian-Her; Sun, Yu-Hsiang, Semiconductor device packages having electromagnetic interference shielding and related methods.
  563. Ding, Yi-Chuan; Chen, Chia-Ching, Semiconductor device packages including connecting elements.
  564. An, JaeSeon; Lee, Jeong; Cha, SangJin; Youn, SungHo, Semiconductor device packages with electromagnetic interference shielding.
  565. Chiu, Chi-Tsung; Hung, Chih-Pin; Huang, Jui-Cheng, Semiconductor device packages with electromagnetic interference shielding.
  566. Chiu, Chi-Tsung; Hung, Chih-Pin; Huang, Jui-Cheng, Semiconductor device packages with electromagnetic interference shielding.
  567. Kim, Seokbong; Yun, Yeonsun; Lee, Yuyong, Semiconductor device packages with electromagnetic interference shielding.
  568. Lee, Yuyong; Kim, Seokbong, Semiconductor device packages with electromagnetic interference shielding.
  569. Liao, Kuo-Hsien; Chen, Jian-Cheng; Fan, Chen-Chuan; Chiu, Chi-Tsung; Hung, Chih-Pin, Semiconductor device packages with electromagnetic interference shielding.
  570. Liao, Kuo-Hsien; Chiu, Chi-Tsung; Hung, Chih-Pin, Semiconductor device packages with electromagnetic interference shielding.
  571. Liao, Kuo-Hsien; Chiu, Chi-Tsung; Hung, Chih-Pin, Semiconductor device packages with electromagnetic interference shielding.
  572. Ding, Yi-Chuan; Chen, Chia-Ching, Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof.
  573. Yang, Hung-Jen; Hsieh, Chuehan; Huang, Min-Lung, Semiconductor device packages, redistribution structures, and manufacturing methods thereof.
  574. Leal, George R.; Fay, Owen R.; Wenzel, Robert J., Semiconductor device with a protected active die region and method therefor.
  575. Lin, Yaojian; Bao, Xusheng; Chen, Kang; Fang, Jianmin, Semiconductor device with a vertical interconnect structure for 3-D FO-WLCSP.
  576. Camacho, Zigmund R.; Tay, Lionel Chien Hui; Bathan, Henry D.; Punzalan, Jeffrey D., Semiconductor device with bump interconnection.
  577. Chi, HeeJo; Cho, NamJu; Shin, HanGil, Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint.
  578. Chi, HeeJo; Cho, NamJu; Shin, HanGil, Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint.
  579. Yamagata, Osamu, Semiconductor device, package structure thereof, and method for manufacturing the semiconductor device.
  580. Matsubara,Yoshinori, Semiconductor device, semiconductor device manufacturing method, and semiconductor device test method.
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