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Method of making a high voltage implanted channel device for VLSI and ULSI processes 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/265
출원번호 US-0013947 (1993-02-04)
발명자 / 주소
  • Summe Richard A. (Kokomo IN) Rusch Randy A. (Kokomo IN) Schnabel Douglas R. (Kokomo IN) Parrish Jack D. (Kokomo IN)
출원인 / 주소
  • Delco Electronics Corporation (Kokomo IN 02)
인용정보 피인용 횟수 : 40  인용 특허 : 0

초록 ▼

A process for fabricating a high voltage CMOS transistor having a non-self aligned implanted channel which permits the operation of the device at high voltages. The non-self aligned implanted channel does not require alignment with the gate electrode of the CMOS device, but is accurately implanted e

대표청구항 ▼

A method for forming a non-self aligned implanted channel in a high voltage device so as to form a high voltage transistor on a substrate which includes low voltage devices, the method being compatible with VLSI and ULSI processes and comprising the steps of: doping the substrate to be a first condu

이 특허를 인용한 특허 (40)

  1. Levy, Sagy; Levin, Sharon; Berkovitch, Noel, Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structure.
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  2. Ito, Satoshi; Okawa, Kazuhiko, Driver circuits and methods for manufacturing driver circuits.
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  3. Merrill Richard Billings, High-voltage MOS transistor on a silicon on insulator wafer.
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  4. Lotfi,Ashraf W.; Tan,Jian, Integrated circuit employable with a power converter.
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  5. Lotfi,Ashraf W.; Tan,Jian, Integrated circuit incorporating higher voltage devices and low voltage devices therein.
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  6. Lotfi,Ashraf W.; Tan,Jian, Integrated circuit incorporating higher voltage devices and low voltage devices therein.
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  7. Lotfi, Ashraf W.; Lopata, Douglas D.; Troutman, William W.; Nigam, Tanya, Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.
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  8. Lotfi, Ashraf W.; Troutman, William W.; Lopata, Douglas Dean; Nigam, Tanya, Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.
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  9. Lotfi, Ashraf W.; Troutman, William W.; Lopata, Douglas Dean; Nigam, Tanya, Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.
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  10. Lotfi, Ashraf W.; Troutman, William W.; Lopata, Douglas Dean; Nigam, Tanya, Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.
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  11. Lotfi, Ashraf W.; Troutman, William W.; Lopata, Douglas Dean; Nigam, Tanya, Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.
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  12. Lotfi, Ashraf W.; Troutman, William W.; Lopata, Douglas Dean; Nigam, Tanya, Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.
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  13. Lotfi, Ashraf W.; Troutman, William W.; Lopata, Douglas Dean; Nigam, Tanya, Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.
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  14. Lotfi, Ashraf W.; Troutman, William W.; Lopata, Douglas Dean; Nigam, Tanya, Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same.
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  15. Lopata, Douglas Dean; Demski, Jeffrey; Norton, Jay; Rojas-Gonzalez, Miguel, Integrated current replicator and method of operating the same.
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  16. Weaver, James; Wang, S. Jonathan; Chen, John; Bengali, Sadiq; Enciso, Edward; Cooney, Tom, Integrating high-voltage CMOS devices with low-voltage CMOS.
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  17. Hung-Der Su TW; Chrong Jung Lin TW; Jong Chen TW; Wen-Ting Chu TW, Integration process to increase high voltage breakdown performance.
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  18. Lotfi, Ashraf W.; Tan, Jian, Laterally diffused metal oxide semiconductor device and method of forming the same.
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  19. Lotfi, Ashraf W.; Tan, Jian, Laterally diffused metal oxide semiconductor device and method of forming the same.
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  20. Lotfi, Ashraf W.; Tian, Jian, Laterally diffused metal oxide semiconductor device and method of forming the same.
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  21. Lotfi,Ashraf W.; Tan,Jian, Laterally diffused metal oxide semiconductor device and method of forming the same.
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  22. Lotfi,Ashraf W.; Tan,Jian, Laterally diffused metal oxide semiconductor device and method of forming the same.
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  23. Christenson, John C.; Chilcott, Dan W.; Forestal, Richard G.; Glenn, Jack L.; Zarabadi, Seyed R., Method for manufacturing a sensor device.
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  24. Hu, Hsien Tang; Hsiao, Chien Chih; Tsai, Chih Hung, Method for manufacturing thin film transistor (TFT) array substrate.
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  25. Lotfi,Ashraf W.; Tan,Jian, Method of forming an integrated circuit employable with a power converter.
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  26. Lotfi,Ashraf W.; Tan,Jian, Method of forming an integrated circuit employable with a power converter.
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  27. Lotfi,Ashraf W.; Tan,Jian, Method of forming an integrated circuit incorporating higher voltage devices and low voltage devices therein.
    상세보기
  28. Lotfi,Ashraf W.; Tan,Jian, Method of forming an integrated circuit incorporating higher voltage devices and low voltage devices therein.
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  29. Lim, Teik Wah; Lotfi, Ashraf W.; Wong, Choong Kit; Weld, John, Packaged integrated circuit including a switch-mode regulator and method of forming the same.
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  30. Sakurai Naoki (Hitachi JPX) Sugawara Yoshitaka (Hitachi JPX), Power semiconductor device with low on-state voltage.
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  31. Mimuro, Yoichi, Semiconductor device.
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  32. Ito, Hiroyasu; Yamamoto, Toshimasa, Semiconductor device and method of manufacturing the same.
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  33. Lotfi, Ashraf W.; Demski, Jeffrey; Feygenson, Anatoly; Lopata, Douglas Dean; Norton, Jay; Weld, John D., Semiconductor device including a redistribution layer and metallic pillars coupled thereto.
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  34. Lopata, Douglas Dean; Demski, Jeffrey; Norton, Jay; Rojas-Gonzales, Miguel, Semiconductor device including a resistor metallic layer and method of forming the same.
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  35. Lopata, Douglas Dean; Demski, Jeffrey; Norton, Jay; Rojas-Gonzales, Miguel, Semiconductor device including a resistor metallic layer and method of forming the same.
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  36. Lopata, Douglas Dean; Demski, Jeffrey; Norton, Jay; Rojas-Gonzales, Miguel, Semiconductor device including a resistor metallic layer and method of forming the same.
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  37. Lotfi, Ashraf W.; Demski, Jeffrey; Feygenson, Anatoly; Lopata, Douglas Dean; Norton, Jay; Weld, John D., Semiconductor device including alternating source and drain regions, and respective source and drain metallic strips.
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  38. Lotfi, Ashraf W.; Demski, Jeffrey; Feygenson, Anatoly; Lopata, Douglas Dean; Norton, Jay; Weld, John D., Semiconductor device including gate drivers around a periphery thereof.
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  39. Shimotsusa,Mineo, Semiconductor device with switching element and corresponding driving circuit formed on a common semiconductor substrate, and liquid emitting apparatus that includes the semiconductor device.
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  40. Hu, Hsien Tang; Hsiao, Chien Chih; Tsai, Chih Hung, TFT array substrate having conductive layers containing molybdenum nitride and copper alloy.
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