|국가/구분||United States(US) Patent 등록|
|미국특허분류(USC)||370/66 ; 370/581|
|발명자 / 주소|
|출원인 / 주소|
|인용정보||피인용 횟수 : 4 인용 특허 : 0|
Switching network for digital switching systems composed of switching matrices connected parallel at the input side wherein the switching matrices contain a frame memory (R1 through Rm) per input for the acceptance of the supplied information that is cyclically written in and randomly read out. The write-in into the frame memories (R1 through Rm) is controlled by auxiliary information in the holding memories (H) supplying the read-out addresses such that the write-in respectively ensues only into that frame memory from which read-out is to be carried out...
A switching network for digital switching systems composed of at least one group of switching matrices connected in parallel at an input side of the switching network, comprising: each of the switching matrices having a plurality of inputs and a plurality of outputs, a number of outputs being less than a number of inputs, input multiplex lines being connected to the inputs and output multiplex lines being connected to the outputs, having frame memories provided per input and having frame memory capacity for storing information of a pulse frame into which...